公开(公告)号：US20130126219A1

公开(公告)日：2013-05-23

申请号：US13657253

申请日：2012-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Pyoungwan Kim ,  Taeeun Kim

IPC: H05K1/02 ,  B32B3/10 ,  H05K1/11

CPC classification number: B32B3/10 ,  H01L23/14 ,  H01L23/145 ,  H01L2924/0002 ,  H05K1/036 ,  H05K1/0366 ,  H05K2201/029 ,  Y10T428/24124 ,  Y10T428/2481 ,  H01L2924/00

Abstract: Provided is a circuit board that includes a first layer on which circuit patterns are disposed, a second layer opposite to the first layer and on which external terminals are disposed, and a core portion disposed between the first and second layers and including a first ply and a second ply which are stacked. The first ply includes a first fiber bundle extending in a first direction, a second fiber bundle extending in a second direction, and a non-fiber area defined by the first and second fiber bundles. The second ply includes a first fiber bundle extending in a third direction and a second fiber bundle extending in a fourth direction. The first and second fiber bundles of the second ply overlap at least part of the non-fiber area of the first ply.

Abstract translation: 本发明提供一种电路板，其具有设置有电路图案的第一层，与第一层相对的第二层，配置有外部端子的第一层和设置在第一层和第二层之间的芯部，并且包括第一层和 堆叠的第二层。 第一层包括沿第一方向延伸的第一纤维束，在第二方向上延伸的第二纤维束和由第一和第二纤维束限定的非纤维区域。 第二层包括沿第三方向延伸的第一纤维束和沿第四方向延伸的第二纤维束。 第二层的第一和第二纤维束与第一层的非纤维区域的至少一部分重叠。

公开(公告)号：US11309228B2

公开(公告)日：2022-04-19

申请号：US16908128

申请日：2020-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunchul Kim ,  Taehun Kim ,  Pyoungwan Kim

IPC: H01L23/367 ,  H01L23/31 ,  H01L21/48 ,  H01L23/373

Abstract: A packaged semiconductor device includes a package substrate, a first semiconductor device on the package substrate, and at least one second semiconductor device that extends on and partially covers the first semiconductor device. A heat dissipating insulation layer is provided as a coating on the first and second semiconductor devices. A conductive heat dissipation member is provided, which extends upwardly from the heat dissipating insulation layer and on portions of the first and second semiconductor devices. A protective member is provided on the package substrate, to cover the first and second semiconductor devices and the conductive heat dissipation member. This protective member includes a first covering portion, which covers an upper surface of the conductive heat dissipation member.

公开(公告)号：US20210335756A1

公开(公告)日：2021-10-28

申请号：US17369119

申请日：2021-07-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinkyeong Seol ,  Sunchul Kim ,  Pyoungwan Kim

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/532 ,  H01L23/16 ,  H01L23/31

Abstract: A semiconductor package including a substrate; a semiconductor stack on the substrate; an underfill between the substrate and the semiconductor stack; an insulating layer conformally covering surfaces of the semiconductor stack and the underfill; a chimney on the semiconductor stack; and a molding member surrounding side surfaces of the chimney, wherein the semiconductor stack has a first upper surface that is a first distance from the substrate and a second upper surface that is a second distance from the substrate, the first distance being greater than the second distance, wherein the chimney includes a thermally conductive filler on the first and second upper surfaces of the semiconductor stack, the thermally conductive filler having a flat upper surface; a thermally conductive spacer on the thermally conductive filler; and a protective layer on the thermally conductive spacer, and wherein an upper surface of the thermally conductive spacer is exposed.

公开(公告)号：US11257786B2

公开(公告)日：2022-02-22

申请号：US16821342

申请日：2020-03-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunchul Kim ,  Kyungsuk Oh ,  Taehun Kim ,  Pyoungwan Kim

IPC: H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  H01L23/00

Abstract: A semiconductor package including a package substrate; a first semiconductor chip on the package substrate; a second semiconductor chip on an upper surface of the first semiconductor chip; an insulating layer on surfaces of the first semiconductor chip and the second semiconductor chip; a heat dissipation member on the insulating layer such that the heat dissipation member includes a region on an upper surface of the first semiconductor chip on which the second semiconductor chip is not disposed, and a region on an upper surface of the second semiconductor chip; a molding member on the package substrate and encapsulating the first semiconductor chip, the second semiconductor chip, and the heat dissipation member such that the molding member exposes at least a portion of an upper surface of the heat dissipation member; and a reinforcing member on the heat dissipation member and the molding member.

公开(公告)号：US11133296B2

公开(公告)日：2021-09-28

申请号：US16698749

申请日：2019-11-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chanhee Jeong ,  Hyunki Kim ,  Junwoo Park ,  Byoung Wook Jang ,  Sunchul Kim ,  Su-Min Park ,  Pyoungwan Kim ,  Inku Kang ,  Heeyeol Kim

IPC: H01L25/10 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498

Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.

公开(公告)号：US10361177B2

公开(公告)日：2019-07-23

申请号：US15960698

申请日：2018-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Young Kim ,  Pyoungwan Kim ,  Hyunki Kim ,  Junwoo Park ,  Sangsoo Kim ,  Seung Hwan Kim ,  Sung-Kyu Park ,  Insup Shin

IPC: H01L21/56 ,  H01L25/00 ,  H01L25/10 ,  H01L25/11

Abstract: Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package comprises a lower semiconductor chip on a lower substrate, a lower molding layer covering the lower semiconductor chip on the lower substrate and including a molding cavity that extends toward the lower semiconductor chip from a top surface of the lower molding layer, an interposer substrate on the top surface of the lower molding layer and including a substrate opening that penetrates the interposer substrate and overlaps the molding cavity, and an upper package on the interposer substrate. The molding cavity has a floor surface spaced apart from the upper package across a substantially hollow space.

公开(公告)号：US11557574B2

公开(公告)日：2023-01-17

申请号：US17369119

申请日：2021-07-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinkyeong Seol ,  Sunchul Kim ,  Pyoungwan Kim

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/532 ,  H01L23/16 ,  H01L23/31

Abstract: A semiconductor package including a substrate; a semiconductor stack on the substrate; an underfill between the substrate and the semiconductor stack; an insulating layer conformally covering surfaces of the semiconductor stack and the underfill; a chimney on the semiconductor stack; and a molding member surrounding side surfaces of the chimney, wherein the semiconductor stack has a first upper surface that is a first distance from the substrate and a second upper surface that is a second distance from the substrate, the first distance being greater than the second distance, wherein the chimney includes a thermally conductive filler on the first and second upper surfaces of the semiconductor stack, the thermally conductive filler having a flat upper surface; a thermally conductive spacer on the thermally conductive filler; and a protective layer on the thermally conductive spacer, and wherein an upper surface of the thermally conductive spacer is exposed.

公开(公告)号：US11482507B2

公开(公告)日：2022-10-25

申请号：US16816593

申请日：2020-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunchul Kim ,  Kyungsuk Oh ,  Taehun Kim ,  Pyoungwan Kim ,  Soohwan Lee

IPC: H01L23/367 ,  H01L25/065 ,  H01L23/31 ,  H01L25/00

Abstract: A semiconductor package includes a package substrate, a first semiconductor chip disposed on the package substrate, at least one second semiconductor chip disposed on a region of an upper surface of the first semiconductor chip, a heat dissipation member disposed in another region of the upper surface of the first semiconductor chip and at least a region of an upper surface of the second semiconductor chip, and having an upper surface in which at least one trench is formed, and a molding member covering the first semiconductor chip, the second semiconductor chip, an upper surface of the package substrate, and side surfaces of the heat dissipation member, and filling the at least one trench while exposing the upper surface of the heat dissipation member.

公开(公告)号：US11075189B2

公开(公告)日：2021-07-27

申请号：US16809837

申请日：2020-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinkyeong Seol ,  Sunchul Kim ,  Pyoungwan Kim

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/16 ,  H01L23/532

Abstract: A semiconductor package including a substrate; a semiconductor stack on the substrate; an underfill between the substrate and the semiconductor stack; an insulating layer conformally covering surfaces of the semiconductor stack and the underfill; a chimney on the semiconductor stack; and a molding member surrounding side surfaces of the chimney, wherein the semiconductor stack has a first upper surface that is a first distance from the substrate and a second upper surface that is a second distance from the substrate, the first distance being greater than the second distance, wherein the chimney includes a thermally conductive filler on the first and second upper surfaces of the semiconductor stack, the thermally conductive filler having a flat upper surface; a thermally conductive spacer on the thermally conductive filler; and a protective layer on the thermally conductive spacer, and wherein an upper surface of the thermally conductive spacer is exposed.

公开(公告)号：US20210104446A1

公开(公告)日：2021-04-08

申请号：US16908128

申请日：2020-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunchul Kim ,  Taehun Kim ,  Pyoungwan Kim

IPC: H01L23/367 ,  H01L23/31

Abstract: A packaged semiconductor device includes a package substrate, a first semiconductor device on the package substrate, and at least one second semiconductor device that extends on and partially covers the first semiconductor device. A heat dissipating insulation layer is provided as a coating on the first and second semiconductor devices. A conductive heat dissipation member is provided, which extends upwardly from the heat dissipating insulation layer and on portions of the first and second semiconductor devices. A protective member is provided on the package substrate, to cover the first and second semiconductor devices and the conductive heat dissipation member. This protective member includes a first covering portion, which covers an upper surface of the conductive heat dissipation member.