公开(公告)号：US20180005686A1

公开(公告)日：2018-01-04

申请号：US15624491

申请日：2017-06-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Seok OH ,  Seong-Hwan JEON

IPC: G11C11/4076 ,  G11C11/4093 ,  G11C29/52 ,  G11C11/4096 ,  G06F11/10

CPC classification number: G11C11/4076 ,  G06F11/1004 ,  G11C7/1066 ,  G11C7/1093 ,  G11C11/4093 ,  G11C11/4096 ,  G11C29/023 ,  G11C29/028 ,  G11C29/52 ,  G11C2029/0411

Abstract: In a method of operating a semiconductor memory device including a memory cell array and a control logic circuit configured to control access to the memory cell array, data synchronized with a differential data clock signal is received from an external memory controller, the data is stored in the memory cell array based on a frequency-divided data clock signal from which the differential data clock signal is divided, data is read from the memory cell array in response to a read command and a target address from the memory controller, and the read data is transmitted to the memory controller with one of a single strobe signal and a differential strobe signal according to a strobe mode of the semiconductor memory device.

公开(公告)号：US20190172512A1

公开(公告)日：2019-06-06

申请号：US16249594

申请日：2019-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Seok OH ,  Seong-Hwan JEON

IPC: G11C8/18 ,  G11C7/22 ,  G11C7/10

CPC classification number: G11C8/18 ,  G11C7/1006 ,  G11C7/1009 ,  G11C7/1045 ,  G11C7/1066 ,  G11C7/1069 ,  G11C7/1072 ,  G11C7/1093 ,  G11C7/1096 ,  G11C7/222 ,  G11C8/12 ,  G11C11/4076 ,  G11C11/4096 ,  G11C29/021 ,  G11C29/028 ,  G11C29/10 ,  G11C29/1201 ,  G11C29/12015 ,  G11C2207/108 ,  G11C2207/2254

Abstract: A method of operating a semiconductor memory device including a plurality of pins configured to transfer data and signals from/to an outside of the semiconductor memory device, a memory cell array and a control logic circuit to control access to the memory cell array. A write command synchronized with a main clock signal and data synchronized with a data clock signal are received from outside of the semiconductor memory device, the data is stored in the memory cell array based on a frequency-divided data clock signal, data is read from the memory cell array in response to a read command and a target address received from the outside of the semiconductor memory device, and the read data is transmitted to the outside of the semiconductor memory device selectively with a strobe signal generated based on a frequency of the main clock signal.