公开(公告)号：US20190013260A1

公开(公告)日：2019-01-10

申请号：US16131182

申请日：2018-09-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-il CHOI ,  Kun-sang PARK ,  Son-kwan HWANG ,  Ji-soon PARK ,  Byung-lyul PARK

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/31 ,  H01L25/065 ,  H01L23/532

Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.

公开(公告)号：US20150111346A1

公开(公告)日：2015-04-23

申请号：US14590036

申请日：2015-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-ho Chun ,  Byung-Iyul PARK ,  Hyun-soo CHUNG ,  Gil-heyun CHOI ,  Son-kwan HWANG

IPC: H01L21/768 ,  H01L23/544 ,  H01L23/00

CPC classification number: H01L21/76898 ,  H01L21/768 ,  H01L21/76841 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/544 ,  H01L24/03 ,  H01L24/81 ,  H01L25/065 ,  H01L25/0657 ,  H01L2223/54426 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05025 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13023 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/8185 ,  H01L2924/00014 ,  H01L2924/06 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

Abstract: A semiconductor chip including through silicon vias (TSVs), wherein the TSVs may be prevented from bending and the method of fabricating the semiconductor chip may be simplified, and a method of fabricating the semiconductor chip. The semiconductor chip includes a silicon substrate having a first surface and a second surface; a plurality of TSVs which penetrate the silicon substrate and protrude above the second surface of the silicon substrate; a polymer pattern layer which is formed on the second surface of the silicon substrate, surrounds side surfaces of the protruding portion of each of the TSVs, and comprises a flat first portion and a second portion protruding above the first portion; and a plated pad which is formed on the polymer pattern layer and covers a portion of each of the TSVs exposed from the polymer pattern layer.

Abstract translation: 包括通过硅通孔（TSV）的半导体芯片，其中可以防止TSV弯曲，并且可以简化制造半导体芯片的方法，以及制造半导体芯片的方法。 半导体芯片包括具有第一表面和第二表面的硅衬底; 多个TSV，其穿透硅衬底并突出在硅衬底的第二表面上方; 形成在硅衬底的第二表面上的聚合物图案层围绕每个TSV的突出部分的侧表面，并且包括平坦的第一部分和在第一部分上方突出的第二部分; 以及形成在聚合物图案层上并覆盖从聚合物图案层露出的每个TSV的一部分的电镀垫。

公开(公告)号：US20170345713A1

公开(公告)日：2017-11-30

申请号：US15638551

申请日：2017-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-ho Chun ,  Byung-lyul PARK ,  Hyun-soo CHUNG ,  Gil-heyun CHOI ,  Son-kwan HWANG

IPC: H01L21/768 ,  H01L23/00 ,  H01L25/065 ,  H01L23/48 ,  H01L23/544 ,  H01L23/31

CPC classification number: H01L21/76898 ,  H01L21/768 ,  H01L21/76841 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/544 ,  H01L24/03 ,  H01L24/81 ,  H01L25/065 ,  H01L25/0657 ,  H01L2223/54426 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05025 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13023 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/8185 ,  H01L2924/00014 ,  H01L2924/06 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00

Abstract: A semiconductor chip including through silicon vias (TSVs), wherein the TSVs may be prevented from bending and the method of fabricating the semiconductor chip may be simplified, and a method of fabricating the semiconductor chip. The semiconductor chip includes a silicon substrate having a first surface and a second surface; a plurality of TSVs which penetrate the silicon substrate and protrude above the second surface of the silicon substrate; a polymer pattern layer which is formed on the second surface of the silicon substrate, surrounds side surfaces of the protruding portion of each of the TSVs, and comprises a flat first portion and a second portion protruding above the first portion; and a plated pad which is formed on the polymer pattern layer and covers a portion of each of the TSVs exposed from the polymer pattern layer.