公开(公告)号：US11417665B2

公开(公告)日：2022-08-16

申请号：US17060026

申请日：2020-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Seok Lee ,  Bomg-Soo Kim ,  Ji-Young Kim ,  Sung-Hee Han ,  Yoo-Sang Hwang

IPC: H01L27/108 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L21/764

Abstract: A semiconductor device includes a plurality of conductive structures arranged on a substrate and spaced apart from each other in a second direction substantially perpendicular to a first direction, in which each of the plurality of conductive structures extends in the first direction. A plurality of contact structures are arranged between the conductive structures in an alternating arrangement and spaced apart from each other in the first direction. A plurality of insulation structures are arranged in a space between the conductive structures and between the contact structures. A plurality of air spacers are arranged between the alternating arrangement of the plurality of conductive structures and the plurality of contact structures, respectively and spaced apart from each other in the first direction.

公开(公告)号：US09634012B2

公开(公告)日：2017-04-25

申请号：US15015651

申请日：2016-02-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Jin Park ,  Chan-sic Yoon ,  Ki-Seok Lee ,  Hyeon-Ok Jung ,  Dae-Ik Kim ,  Bong-Soo Kim ,  Yong-Kwan Kim ,  Eun-Jung Kim ,  Se-Myeong Jang ,  Min-su Choi ,  Sung-Hee Han ,  Yoo-Sang Hwang

IPC: H01L21/311 ,  H01L27/108 ,  H01L21/308

CPC classification number: H01L27/10894 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10885

Abstract: In a method of forming active patterns, first patterns are formed in a first direction on a cell region of a substrate, and a second pattern is formed on a peripheral circuit region of the substrate. The first pattern extends in a third direction crossing the first direction. First masks are formed in the first direction on the first patterns, and a second mask is formed on the second pattern. The first mask extends in a fourth direction crossing the third direction. Third masks are formed between the first masks extending in the fourth direction. The first and second patterns are etched using the first to third masks to form third and fourth patterns. Upper portions of the substrate are etched using the third and fourth patterns to form first and second active patterns in the cell and peripheral circuit regions.

公开(公告)号：US10818671B2

公开(公告)日：2020-10-27

申请号：US16134252

申请日：2018-09-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Seok Lee ,  Bomg-Soo Kim ,  Ji-Young Kim ,  Sung-Hee Han ,  Yoo-Sang Hwang

IPC: H01L27/108 ,  H01L21/764 ,  H01L23/528 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device includes a plurality of conductive structures arranged on a substrate and spaced apart from each other in a second direction substantially perpendicular to a first direction, in which each of the plurality of conductive structures extends in the first direction. A plurality of contact structures are arranged between the conductive structures in an alternating arrangement and spaced apart from each other in the first direction. A plurality of insulation structures are arranged in a space between the conductive structures and between the contact structures. A plurality of air spacers are arranged between the alternating arrangement of the plurality of conductive structures and the plurality of contact structures, respectively and spaced apart from each other in the first direction.

公开(公告)号：US20170025420A1

公开(公告)日：2017-01-26

申请号：US15015651

申请日：2016-02-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Jin Park ,  Chan-sic Yoon ,  Ki-Seok Lee ,  Hyeon-Ok Jung ,  Dae-Ik Kim ,  Bong-Soo Kim ,  Yong-Kwan Kim ,  Eun-Jung Kim ,  Se-Myeong Jang ,  Min-su Choi ,  Sung-Hee Han ,  Yoo-Sang Hwang

IPC: H01L27/108 ,  H01L21/308

CPC classification number: H01L27/10894 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10885

Abstract: In a method of forming active patterns, first patterns are formed in a first direction on a cell region of a substrate, and a second pattern is formed on a peripheral circuit region of the substrate. The first pattern extends in a third direction crossing the first direction. First masks are formed in the first direction on the first patterns, and a second mask is formed on the second pattern. The first mask extends in a fourth direction crossing the third direction. Third masks are formed between the first masks extending in the fourth direction. The first and second patterns are etched using the first to third masks to form third and fourth patterns. Upper portions of the substrate are etched using the third and fourth patterns to form first and second active patterns in the cell and peripheral circuit regions.

Abstract translation: 在形成有源图案的方法中，在基板的单元区域上沿第一方向形成第一图案，并且在基板的外围电路区域上形成第二图案。 第一图案沿与第一方向交叉的第三方向延伸。 第一掩模在第一图案上沿第一方向形成，第二掩模形成在第二图案上。 第一掩模沿与第三方向交叉的第四方向延伸。 第三掩模形成在沿第四方向延伸的第一掩模之间。 使用第一至第三掩模蚀刻第一和第二图案以形成第三和第四图案。 使用第三和第四图案蚀刻衬底的上部，以在单元和外围电路区域中形成第一和第二有源图案。

公开(公告)号：US10665498B2

公开(公告)日：2020-05-26

申请号：US15196273

申请日：2016-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun-Jung Kim ,  Bong-Soo Kim ,  Yong-Kwan Kim ,  Sung-Hee Han ,  Yoo-Sang Hwang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L27/108

Abstract: A semiconductor device, including an active region defined in a semiconductor substrate; a first contact plug on the semiconductor substrate, the first contact plug being connected to the active region; a bit line on the semiconductor substrate, the bit line being adjacent to the first contact plug; a first air gap spacer between the first contact plug and the bit line; a landing pad on the first contact plug; a blocking insulating layer on the bit line; and an air gap capping layer on the first air gap spacer, the air gap capping layer vertically overlapping the first air gap spacer, the air gap capping layer being between the blocking insulating layer and the landing pad, an upper surface of the blocking insulating layer being at a height equal to or higher than an upper surface of the landing pad.

公开(公告)号：US09276003B2

公开(公告)日：2016-03-01

申请号：US14208108

申请日：2014-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jea-Hyun Kim ,  Kyong-Seok Song ,  Sung-Hee Han

IPC: H01L27/108 ,  H01L21/762 ,  H01L27/02

CPC classification number: H01L27/10855 ,  H01L21/76224 ,  H01L27/0207 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device includes a substrate with an active pattern, the active pattern having a first extension portion extending in a first direction substantially parallel to a top surface of the substrate, a second extension portion extending from a first end of the first extension portion in a third direction oriented obliquely to the first direction, a third extension portion extending from a second end of the first extension portion in a direction opposed to the third direction, a first projection portion protruding from the second extension portion in a direction opposed to the first direction, the first projection portion being spaced apart from the first extension portion, and a second projection portion protruding from the third extension portion in the first direction, the second projection portion being spaced apart from the first extension portion.

Abstract translation: 半导体器件包括具有有源图案的衬底，所述有源图案具有沿着基本上平行于所述衬底的顶表面的第一方向延伸的第一延伸部分，从所述第一延伸部分的第一端部延伸的第二延伸部分 第三方向与第一方向倾斜地定向，第三延伸部分从第一延伸部分的第二端部沿与第三方向相反的方向延伸;第一突出部分，从与第一方向相反的方向从第二延伸部分突出; 所述第一突起部分与所述第一延伸部分间隔开，所述第二突出部分在所述第一方向上从所述第三延伸部分突出，所述第二突出部分与所述第一延伸部分间隔开。

公开(公告)号：US11043397B2

公开(公告)日：2021-06-22

申请号：US16509792

申请日：2019-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeong-Dong Lee ,  Min-Su Choi ,  Jun-Hyeok Ahn ,  Sung-Hee Han ,  Ce-Ra Hong

IPC: H01L21/3213 ,  H01L27/108 ,  H01L21/033

Abstract: First and second mask layers are formed on a target layer. The second mask layer is patterned to form second mask patterns each of which having a rhomboid shape with a first diagonal length and a second diagonal length. A trimming process is performed on the second mask patterns to form second masks by etch. First portions of first opposite vertices of each second mask pattern are etched more than second portions of second opposite vertices of each second mask pattern. A first diagonal length between the first opposite vertices is greater than a second diagonal length between the second opposite vertices. The first mask layer is patterned to form first masks by etching the first mask layer using the second masks as an etching mask. The target layer is patterned to form target patterns by etching the target layer using the first masks as an etching mask.

公开(公告)号：US20190157275A1

公开(公告)日：2019-05-23

申请号：US16134252

申请日：2018-09-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Seok Lee ,  Bomg-Soo Kim ,  Ji-Young Kim ,  Sung-Hee Han ,  Yoo-Sang Hwang

IPC: H01L27/108 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor device includes a plurality of conductive structures arranged on a substrate and spaced apart from each other in a second direction substantially perpendicular to a first direction, in which each of the plurality of conductive structures extends in the first direction. A plurality of contact structures are arranged between the conductive structures in an alternating arrangement and spaced apart from each other in the first direction. A plurality of insulation structures are arranged in a space between the conductive structures and between the contact structures. A plurality of air spacers are arranged between the alternating arrangement of the plurality of conductive structures and the plurality of contact structures, respectively and spaced apart from each other in the first direction.