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公开(公告)号:US10685957B2
公开(公告)日:2020-06-16
申请号:US16005915
申请日:2018-06-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-Hyun Choi , Yong-Suk Tak , Gi-Gwan Park , Bon-Young Koo , Ki-Yeon Park , Won-Oh Seo
IPC: H01L27/088 , H01L29/66 , H01L21/8238 , H01L27/092 , H01L29/417 , H01L29/78 , H01L21/02 , H01L21/8234 , H01L23/26 , H01L29/08 , H01L29/16 , H01L29/161 , H01L29/165
Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.
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公开(公告)号:US20180301452A1
公开(公告)日:2018-10-18
申请号:US16005915
申请日:2018-06-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-Hyun Choi , Yong-Suk Tak , Gi-Gwan Park , Bon-Young Koo , Ki-Yeon Park , Won-Oh Seo
IPC: H01L27/088 , H01L21/02 , H01L29/78 , H01L21/8234 , H01L21/8238 , H01L23/26 , H01L27/092 , H01L29/08 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/66
CPC classification number: H01L27/0886 , H01L21/02636 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L21/823814 , H01L21/823821 , H01L21/823864 , H01L23/26 , H01L27/0924 , H01L29/0847 , H01L29/16 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/41791 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/6656 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785 , H01L29/7851
Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.
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公开(公告)号:US10797160B2
公开(公告)日:2020-10-06
申请号:US16149387
申请日:2018-10-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyun-Jun Sim , Won-Oh Seo , Sun-Jung Kim , Ki-Yeon Park
Abstract: A method of fabricating a semiconductor device may include forming a fin structure on a substrate; forming an interface film having a first thickness on the fin structure using a first process; forming a gate dielectric film having a second thickness on the interface film using a second process different from the first process; and densifying the gate dielectric film using a third process different from the first and second processes. The second thickness may be greater than the first thickness, and the first thickness of the interface film may be unchanged after the densifying of the gate dielectric film.
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公开(公告)号:US10026736B2
公开(公告)日:2018-07-17
申请号:US15384834
申请日:2016-12-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-Hyun Choi , Yong-Suk Tak , Gi-Gwan Park , Bon-Young Koo , Ki-Yeon Park , Won-Oh Seo
IPC: H01L29/66 , H01L27/088 , H01L21/02 , H01L21/8234 , H01L23/26 , H01L29/08 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/78 , H01L21/8238 , H01L27/092
Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgassing prevention pattern sequentially stacked.
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