公开(公告)号：US10797160B2

公开(公告)日：2020-10-06

申请号：US16149387

申请日：2018-10-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Jun Sim ,  Won-Oh Seo ,  Sun-Jung Kim ,  Ki-Yeon Park

IPC: H01L29/66 ,  H01L21/28 ,  H01L21/02 ,  H01L27/11 ,  H01L21/3213 ,  H01L29/49

Abstract: A method of fabricating a semiconductor device may include forming a fin structure on a substrate; forming an interface film having a first thickness on the fin structure using a first process; forming a gate dielectric film having a second thickness on the interface film using a second process different from the first process; and densifying the gate dielectric film using a third process different from the first and second processes. The second thickness may be greater than the first thickness, and the first thickness of the interface film may be unchanged after the densifying of the gate dielectric film.

公开(公告)号：US10026736B2

公开(公告)日：2018-07-17

申请号：US15384834

申请日：2016-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Hyun Choi ,  Yong-Suk Tak ,  Gi-Gwan Park ,  Bon-Young Koo ,  Ki-Yeon Park ,  Won-Oh Seo

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/02 ,  H01L21/8234 ,  H01L23/26 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/092

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgassing prevention pattern sequentially stacked.

公开(公告)号：US20140256112A1

公开(公告)日：2014-09-11

申请号：US14193071

申请日：2014-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L49/02

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

Abstract translation: 提供半导体器件及其制造方法。 所述方法可以包括在半导体衬底上形成模塑层。 形成通过成形层的存储电极。 存储电极的一部分通过部分蚀刻成型层而露出。 通过氧化存储电极的暴露部分形成牺牲氧化物层。 去除部分蚀刻的成型层和牺牲氧化物层。 在其上移除成型层和牺牲氧化物层的基板上形成电容器电介质层。 在电容器电介质层上形成平板电极。

公开(公告)号：US09685450B2

公开(公告)日：2017-06-20

申请号：US15072521

申请日：2016-03-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L21/20 ,  H01L27/108 ,  H01L49/02 ,  H01L21/283 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

公开(公告)号：US09324781B2

公开(公告)日：2016-04-26

申请号：US14708423

申请日：2015-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L21/20 ,  H01L49/02 ,  H01L27/108

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

公开(公告)号：US09059331B2

公开(公告)日：2015-06-16

申请号：US14193071

申请日：2014-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Yeon Park ,  Jae-Hyoung Choi ,  Vladimir Urazaev ,  Jin-Ha Jeong

IPC: H01L21/20 ,  H01L49/02 ,  H01L27/108

CPC classification number: H01L27/1085 ,  H01L21/283 ,  H01L21/311 ,  H01L21/76802 ,  H01L27/108 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/92

Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.

Abstract translation: 提供半导体器件及其制造方法。 所述方法可以包括在半导体衬底上形成模塑层。 形成通过成型层的存储电极。 存储电极的一部分通过部分蚀刻成型层而露出。 通过氧化存储电极的暴露部分形成牺牲氧化物层。 去除部分蚀刻的成型层和牺牲氧化物层。 在其上移除成型层和牺牲氧化物层的基板上形成电容器电介质层。 在电容器电介质层上形成平板电极。

公开(公告)号：US10685957B2

公开(公告)日：2020-06-16

申请号：US16005915

申请日：2018-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Hyun Choi ,  Yong-Suk Tak ,  Gi-Gwan Park ,  Bon-Young Koo ,  Ki-Yeon Park ,  Won-Oh Seo

IPC: H01L27/088 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/417 ,  H01L29/78 ,  H01L21/02 ,  H01L21/8234 ,  H01L23/26 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.

公开(公告)号：US20180301452A1

公开(公告)日：2018-10-18

申请号：US16005915

申请日：2018-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Hyun Choi ,  Yong-Suk Tak ,  Gi-Gwan Park ,  Bon-Young Koo ,  Ki-Yeon Park ,  Won-Oh Seo

IPC: H01L27/088 ,  H01L21/02 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L23/26 ,  H01L27/092 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L27/0886 ,  H01L21/02636 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L23/26 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.

公开(公告)号：US09559185B2

公开(公告)日：2017-01-31

申请号：US15134906

申请日：2016-04-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Suk Tak ,  Gyeom Kim ,  Ki-Yeon Park ,  Sung-Hyun Choi ,  Bon-Young Koo

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L29/161 ,  H01L29/165 ,  H01L29/08 ,  H01L29/06

CPC classification number: H01L29/6656 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate including an active fin structure, a plurality of gate structures, a first spacer on sidewalls of each of the gate structures, and a second spacer on sidewalls of the first spacer. The active fin structure may extend in a first direction and including a plurality of active fins with adjacent active fins divided by a recess. Each of the plurality of gate structures may extend in a second direction crossing the first direction, and may cover the active fins. The first spacer may include silicon oxycarbonitride (SiOCN), and may have a first carbon concentration. The second spacer may include SiOCN and may have a second carbon concentration which is different from the first carbon concentration. The semiconductor device may have a low parasitic capacitance and good electrical characteristics.

Abstract translation: 半导体器件包括：衬底，其包括有源鳍结构，多个栅极结构，每个栅极结构的侧壁上的第一间隔物，以及在第一间隔物的侧壁上的第二间隔物。 主动翅片结构可以在第一方向上延伸并且包括多个活动翅片，相邻的活动翅片由凹部分开。 多个栅极结构中的每一个可以在与第一方向交叉的第二方向上延伸，并且可以覆盖活动鳍片。 第一间隔物可以包括硅碳氮氧化物（SiOCN），并且可以具有第一碳浓度。 第二间隔物可以包括SiOCN，并且可以具有不同于第一碳浓度的第二碳浓度。 半导体器件可以具有低寄生电容和良好的电特性。

公开(公告)号：US09247403B2

公开(公告)日：2016-01-26

申请号：US14024784

申请日：2013-09-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Sun Jo ,  Jeong-Hoo Kim ,  Ki-Yeon Park ,  Seo-Young Park ,  Eun-Seok Hong

IPC: H04M3/00 ,  H04W4/20 ,  H04W4/16

CPC classification number: H04W4/20 ,  H04W4/16

Abstract: A method and an apparatus perform Mobile High-definition Link (MHL) signal filtering. The method of performing the Mobile High-definition Link (MHL) signal filtering in a terminal includes determining whether a transmission device for MHL signal transmission is connected; determining whether a call continues when the transmission device is connected; and determining whether to perform the MHL signal filtering in the terminal based on whether the call continues. Accordingly, there is an advantage of improving picture quality of an image output from a multimedia device by effectively removing a common mode noise even when an RF weak electric field is formed due to call generation.

Abstract translation: 一种方法和装置执行移动高清链路（MHL）信号滤波。 在终端中执行移动高清晰度链路（MHL）信号滤波的方法包括确定是否连接用于MHL信号传输的传输设备; 当所述传输设备被连接时，确定呼叫是否继续; 以及基于所述呼叫是否继续，确定是否在所述终端中执行所述MHL信号过滤。 因此，即使在由于呼叫产生而形成RF弱电场的情况下，也可以通过有效地去除共模噪声来提高从多媒体装置输出的图像的图像质量的优点。