公开(公告)号：US10147723B2

公开(公告)日：2018-12-04

申请号：US15653733

申请日：2017-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-Hoon Kim ,  Jin-Bum Kim ,  Kwan-Heum Lee ,  Byeong-Chan Lee ,  Cho-Eun Lee ,  Jin-Hee Han ,  Bon-Young Koo

IPC: H01L27/088 ,  H01L27/02 ,  H01L29/78 ,  H01L27/11 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417

Abstract: A semiconductor device includes a substrate, a first active fin and a second active fin on the substrate, respectively, a plurality of first epitaxial layers on the first active fin and on the second active fin, respectively, a plurality of second epitaxial layers on the plurality of first epitaxial layers, a bridge layer connecting the plurality of second epitaxial layers to each other, and a third epitaxial layer on the bridge layer.

公开(公告)号：US10141427B2

公开(公告)日：2018-11-27

申请号：US15187430

申请日：2016-06-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-In Choi ,  Gyeom Kim ,  Hong-Sik Yoon ,  Bon-Young Koo ,  Wook-Je Kim

IPC: H01L29/66 ,  H01L29/768 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238

Abstract: A semiconductor device includes a gate pattern on a substrate, a multi-channel active pattern under the gate pattern to cross the gate pattern and having a first region not overlapping the gate pattern and a second region overlapping the gate pattern, a diffusion layer in the multi-channel active pattern along the outer periphery of the first region and including an impurity having a concentration, and a liner on the multi-channel active pattern, the liner extending on lateral surfaces of the first region and not extending on a top surface of the first region. Related fabrication methods are also described.

公开(公告)号：US09275995B2

公开(公告)日：2016-03-01

申请号：US14543140

申请日：2014-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Bum Kim ,  Bon-Young Koo ,  Seok-Hoon Kim ,  Chul Kim ,  Kwan-Heum Lee ,  Byeong-Chan Lee ,  Su-Jin Jung

IPC: H01L27/088 ,  H01L29/161 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/785

Abstract: An integrated circuit device includes an electrically conductive pattern on a substrate. This electrically conductive pattern may be a gate pattern of a field effect transistor. A first electrically insulating spacer is provided on a sidewall of the electrically conductive pattern. The first electrically insulating spacer includes a first lower spacer and a first upper spacer, which extends on the first lower spacer and has a side surface vertically aligned with a corresponding side surface of the first lower spacer. The first upper spacer has a greater dielectric constant relative to a dielectric constant of the first lower spacer. A pair of parallel channel regions may also be provided, which protrude from a surface of the substrate. The electrically conductive pattern may surround top and side surfaces of the pair of parallel channel regions.

Abstract translation: 集成电路器件包括在衬底上的导电图案。 该导电图案可以是场效应晶体管的栅极图案。 第一电绝缘垫片设置在导电图案的侧壁上。 第一电绝缘间隔件包括第一下间隔件和第一上间隔件，其在第一下间隔件上延伸并且具有与第一下间隔件的对应侧表面垂直对准的侧表面。 第一上间隔物相对于第一下间隔物的介电常数具有更大的介电常数。 还可以设置一对平行的通道区域，其从衬底的表面突出。 导电图案可以围绕该对平行通道区域的顶表面和侧表面。

公开(公告)号：US10685957B2

公开(公告)日：2020-06-16

申请号：US16005915

申请日：2018-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Hyun Choi ,  Yong-Suk Tak ,  Gi-Gwan Park ,  Bon-Young Koo ,  Ki-Yeon Park ,  Won-Oh Seo

IPC: H01L27/088 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/417 ,  H01L29/78 ,  H01L21/02 ,  H01L21/8234 ,  H01L23/26 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.

公开(公告)号：US20180301452A1

公开(公告)日：2018-10-18

申请号：US16005915

申请日：2018-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Hyun Choi ,  Yong-Suk Tak ,  Gi-Gwan Park ,  Bon-Young Koo ,  Ki-Yeon Park ,  Won-Oh Seo

IPC: H01L27/088 ,  H01L21/02 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L23/26 ,  H01L27/092 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L27/0886 ,  H01L21/02636 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L23/26 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.

公开(公告)号：US09559185B2

公开(公告)日：2017-01-31

申请号：US15134906

申请日：2016-04-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Suk Tak ,  Gyeom Kim ,  Ki-Yeon Park ,  Sung-Hyun Choi ,  Bon-Young Koo

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L29/161 ,  H01L29/165 ,  H01L29/08 ,  H01L29/06

CPC classification number: H01L29/6656 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate including an active fin structure, a plurality of gate structures, a first spacer on sidewalls of each of the gate structures, and a second spacer on sidewalls of the first spacer. The active fin structure may extend in a first direction and including a plurality of active fins with adjacent active fins divided by a recess. Each of the plurality of gate structures may extend in a second direction crossing the first direction, and may cover the active fins. The first spacer may include silicon oxycarbonitride (SiOCN), and may have a first carbon concentration. The second spacer may include SiOCN and may have a second carbon concentration which is different from the first carbon concentration. The semiconductor device may have a low parasitic capacitance and good electrical characteristics.

Abstract translation: 半导体器件包括：衬底，其包括有源鳍结构，多个栅极结构，每个栅极结构的侧壁上的第一间隔物，以及在第一间隔物的侧壁上的第二间隔物。 主动翅片结构可以在第一方向上延伸并且包括多个活动翅片，相邻的活动翅片由凹部分开。 多个栅极结构中的每一个可以在与第一方向交叉的第二方向上延伸，并且可以覆盖活动鳍片。 第一间隔物可以包括硅碳氮氧化物（SiOCN），并且可以具有第一碳浓度。 第二间隔物可以包括SiOCN，并且可以具有不同于第一碳浓度的第二碳浓度。 半导体器件可以具有低寄生电容和良好的电特性。

公开(公告)号：US20160284703A1

公开(公告)日：2016-09-29

申请号：US15177421

申请日：2016-06-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-Hoon Kim ,  Jin-Bum Kim ,  Kwan-Heum Lee ,  Byeong-Chan Lee ,  Cho-Eun Lee ,  Jin-Hee Han ,  Bon-Young Koo

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/78 ,  H01L21/8234 ,  H01L27/092

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/823475 ,  H01L27/0207 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/78 ,  H01L29/7842 ,  H01L29/7849 ,  H01L29/785

Abstract: A semiconductor device includes a substrate, a first active fin and a second active fin on the substrate, respectively, a plurality of first epitaxial layers on the first active fin and on the second active fin, respectively, a plurality of second epitaxial layers on the plurality of first epitaxial layers, a bridge layer connecting the plurality of second epitaxial layers to each other, and a third epitaxial layer on the bridge layer.

公开(公告)号：US10727348B2

公开(公告)日：2020-07-28

申请号：US16367813

申请日：2019-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-Hoon Kim ,  Bon-Young Koo ,  Nam-Kyu Kim ,  Woo-Bin Song ,  Byeong-Chan Lee ,  Su-Jin Jung

IPC: H01L27/12 ,  H01L27/088 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66

Abstract: A semiconductor device may include first and second fins formed side by side on a substrate, a first elevated doped region formed on the first fin and having a first doping concentration of impurities, a second elevated doped region formed on the second fin, and a first bridge connecting the first elevated doped region and the second elevated doped region to each other. Methods of manufacturing such a semiconductor device are also disclosed.

公开(公告)号：US10388791B2

公开(公告)日：2019-08-20

申请号：US15398788

申请日：2017-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-Hoon Kim ,  Bon-Young Koo ,  Nam-Kyu Kim ,  Woo-Bin Song ,  Byeong-Chan Lee ,  Su-Jin Jung

IPC: H01L27/12 ,  H01L27/088 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66

Abstract: A semiconductor device may include first and second fins formed side by side on a substrate, a first elevated doped region formed on the first fin and having a first doping concentration of impurities, a second elevated doped region formed on the second fin, and a first bridge connecting the first elevated doped region and the second elevated doped region to each other. Methods of manufacturing such a semiconductor device are also disclosed.

公开(公告)号：US10026736B2

公开(公告)日：2018-07-17

申请号：US15384834

申请日：2016-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Hyun Choi ,  Yong-Suk Tak ,  Gi-Gwan Park ,  Bon-Young Koo ,  Ki-Yeon Park ,  Won-Oh Seo

IPC: H01L29/66 ,  H01L27/088 ,  H01L21/02 ,  H01L21/8234 ,  H01L23/26 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/092

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgassing prevention pattern sequentially stacked.