公开(公告)号：US10083915B2

公开(公告)日：2018-09-25

申请号：US15609183

申请日：2017-05-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-hyuk Kim ,  Sang-hyun Lee ,  Sung-jin Kim ,  Yong-cheol Seo ,  Jin-kuk Bae

IPC: H01L21/78 ,  H01L23/544 ,  H01L23/31 ,  H01L23/00 ,  H01L21/784 ,  H01L21/768 ,  H01L21/822

CPC classification number: H01L23/544 ,  H01L21/76874 ,  H01L21/78 ,  H01L21/784 ,  H01L21/822 ,  H01L23/3157 ,  H01L23/3171 ,  H01L23/562 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/94 ,  H01L2223/5446 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/0508 ,  H01L2224/05111 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device includes a semiconductor substrate including a main chip region and a remaining scribe lane region surrounding the main chip region, a passivation layer on the main chip region, the passivation layer including a plurality of bridge patterns extending from the main chip region in a first direction across the remaining scribe lane region, a plurality of bump pads exposed by the passivation layer on the main chip region, a plurality of dam structures along edges of the main chip region on the remaining scribe lane region, the plurality of bridge patterns arranged on the plurality of dam structures at a first pitch in the first direction, a seed layer on the plurality of bump pads, and bumps on the seed layer.