公开(公告)号：US20240339422A1

公开(公告)日：2024-10-10

申请号：US18298064

申请日：2023-04-10

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Che Wei YANG ,  Kuo-Ming WU ,  Sheng-Chau CHEN ,  Cheng-Yuan TSAI ,  Hau-Yi HSIAO ,  Chung-Yi YU

IPC: H01L23/00

CPC classification number: H01L24/08 ,  H01L23/562 ,  H01L24/03 ,  H01L24/80 ,  H01L24/06 ,  H01L2224/02235 ,  H01L2224/0226 ,  H01L2224/03011 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: Some implementations described herein provide techniques and apparatuses for forming a stacked die product including two or more integrated circuit dies. A bond interface between two integrated circuit dies that are included in the stacked die product includes a layered structure. As part of the layered structure, respective layers of a sealant material are directly on co-facing surfaces of the two integrated circuit dies. The layered structure further includes one or more bonding layers between the respective layers of the sealant material that are directly on the co-facing surfaces of the two integrated circuit dies. The layered structure may reduce lateral stresses throughout the bond interface to reduce a likelihood of warpage of the two integrated circuit dies.

公开(公告)号：US20240321851A1

公开(公告)日：2024-09-26

申请号：US18506346

申请日：2023-11-10

Applicant: SAMSUNG ELECTERONICS CO., LTD.

Inventor： CHOONGBIN YIM ,  Jongkook Kim ,  Chengtar Wu

IPC: H01L25/18 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H10B80/00

CPC classification number: H01L25/18 ,  H01L21/568 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/95 ,  H01L25/50 ,  H10B80/00 ,  H01L2224/0557 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/08145 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/19 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/80006 ,  H01L2224/80357 ,  H01L2224/80379 ,  H01L2224/80896 ,  H01L2224/83005 ,  H01L2224/83862 ,  H01L2224/92125 ,  H01L2224/95001 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0504 ,  H01L2924/05442 ,  H01L2924/059

Abstract: A semiconductor package includes: a redistribution layer structure; a first semiconductor die and a second semiconductor die disposed on the redistribution layer structure; a bridge die disposed on the first semiconductor die and the second semiconductor die and that electrically connects the first semiconductor die and the second semiconductor die to each other; and a molding material disposed on the redistribution layer structure and that molds of the first semiconductor die, the second semiconductor die, and the bridge die. A bottom surface of the first semiconductor die and a bottom surface of the second semiconductor die are coplanar with an upper surface of the redistribution layer structure.

公开(公告)号：US20240304575A1

公开(公告)日：2024-09-12

申请号：US18517471

申请日：2023-11-22

Applicant: TONG HSING ELECTRONIC INDUSTRIES, LTD.

Inventor： ZZU-CHI CHIU ,  WEI-CHUNG CHAO ,  YAN-WEI CHEN

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/08 ,  H01L24/48 ,  H01L2224/0311 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/05147 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/08225 ,  H01L2224/48229 ,  H01L2924/2064

Abstract: A bonding structure for connecting a chip and a metal material, and a manufacturing method thereof are provided. The bonding structure includes a substrate, a chip, a metal member, at least one metal wire and an alloy connection layer. An upper surface of the substrate has a first metal pad and a second metal pad. The chip is disposed on the first metal pad. The metal member is disposed above the chip. The at least one metal wire has a first end and a second end, the first end is connected to an upper surface of the metal piece, and the second end is connected to the second metal pad. The alloy connection layer is connected between the metal member and the chip, and covers at least a part of a lower surface of the metal member.

公开(公告)号：US20240227089A9

公开(公告)日：2024-07-11

申请号：US18271531

申请日：2022-01-20

Applicant: SEKISUI CHEMICAL CO., LTD.

Inventor： Hidefumi YASUI ,  Kiyoto MATSUSHITA

IPC: B23K35/36 ,  B23K35/02 ,  C08G59/24 ,  C08G59/42 ,  C08G59/68 ,  H01L23/00 ,  H05K3/34 ,  H05K3/36

CPC classification number: B23K35/3613 ,  B23K35/025 ,  C08G59/245 ,  C08G59/4238 ,  C08G59/688 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H05K3/3436 ,  H05K3/3489 ,  H05K3/368 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/0568 ,  H01L2224/05684 ,  H01L2224/1369 ,  H01L2224/27422 ,  H01L2224/29078 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/73103 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81815 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2924/0665 ,  H05K2203/0485

Abstract: Provided is a non-electroconductive flux capable of enhancing productivity and impact resistance of a connected structure to be obtained and suppressing occurrence of solder flash. The non-electroconductive flux according to the present invention contains an epoxy compound, an acid anhydride curing agent, and an organophosphorus compound.

公开(公告)号：US11996401B2

公开(公告)日：2024-05-28

申请号：US18302063

申请日：2023-04-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsien-Wei Chen ,  Jie Chen

IPC: H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/18 ,  H01L21/304

CPC classification number: H01L25/50 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3107 ,  H01L23/49811 ,  H01L24/02 ,  H01L24/03 ,  H01L24/09 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/96 ,  H01L25/065 ,  H01L25/0657 ,  H01L25/10 ,  H01L25/105 ,  H01L25/18 ,  H01L21/304 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/02331 ,  H01L2224/02373 ,  H01L2224/03003 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/06181 ,  H01L2224/0905 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/12105 ,  H01L2224/13008 ,  H01L2224/13021 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13181 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/2518 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/92 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2224/45144 ,  H01L2924/00 ,  H01L2224/96 ,  H01L2224/81 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/81447 ,  H01L2924/00014 ,  H01L2224/81411 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/13166 ,  H01L2924/01029 ,  H01L2224/13181 ,  H01L2924/01029 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/0105 ,  H01L2224/13139 ,  H01L2924/00014 ,  H01L2224/13164 ,  H01L2924/00014 ,  H01L2224/13109 ,  H01L2924/00014 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/11452 ,  H01L2924/00014 ,  H01L2224/1145 ,  H01L2924/00014 ,  H01L2224/1132 ,  H01L2924/00014 ,  H01L2224/13294 ,  H01L2924/00014 ,  H01L2224/133 ,  H01L2924/014 ,  H01L2224/13311 ,  H01L2924/01047 ,  H01L2224/92 ,  H01L2221/68304 ,  H01L2224/03003 ,  H01L21/568 ,  H01L21/304 ,  H01L24/81 ,  H01L2221/68381 ,  H01L24/81 ,  H01L2224/92 ,  H01L2221/68304 ,  H01L2224/03 ,  H01L21/568 ,  H01L21/304 ,  H01L24/81 ,  H01L2221/68381 ,  H01L24/81 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05171 ,  H01L2924/01029 ,  H01L2224/05166 ,  H01L2924/01074 ,  H01L2224/05082 ,  H01L2224/05655 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05083 ,  H01L2224/05644 ,  H01L2224/05147 ,  H01L2224/05171 ,  H01L2924/01029 ,  H01L2224/05171 ,  H01L2224/05082 ,  H01L2224/05647 ,  H01L2224/05166 ,  H01L2924/01074 ,  H01L2224/05166 ,  H01L2224/05082 ,  H01L2224/05644 ,  H01L2224/05155 ,  H01L2224/05147 ,  H01L2224/45144 ,  H01L2924/00011 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a semiconductor package including a first package including one or more dies, and a redistribution layer coupled to the one or more dies at a first side of the first package with a first set of bonding joints. The redistribution layer including more than one metal layer disposed in more than one passivation layer, the first set of bonding joints being directly coupled to at least one of the one or more metal layers, and a first set of connectors coupled to a second side of the redistribution layer, the second side being opposite the first side.

公开(公告)号：US20240153908A1

公开(公告)日：2024-05-09

申请号：US18204965

申请日：2023-06-02

Applicant: HKC CORPORATION LIMITED

Inventor： Yang PU ,  Haoxuan Zheng

IPC: H01L23/00 ,  H01L25/16 ,  H01L33/38 ,  H01L33/62

CPC classification number: H01L24/81 ,  H01L24/02 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L24/16 ,  H01L25/167 ,  H01L33/38 ,  H01L33/62 ,  H01L2224/0217 ,  H01L2224/0224 ,  H01L2224/05555 ,  H01L2224/05573 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/13016 ,  H01L2224/16145 ,  H01L2224/81002 ,  H01L2224/81005 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81141 ,  H01L2224/818 ,  H01L2924/12041 ,  H01L2924/13069 ,  H01L2924/13091

Abstract: A driving substrate, a micro LED transfer device and a micro LED transfer method are provided. A side surface of the driving substrate is arranged with a binding metal layer, a positioning layer is arranged around the binding metal layer, and a width of the positioning layer at a position away from the driving substrate is less than that a width at a position close to the driving substrate.

公开(公告)号：US11973045B2

公开(公告)日：2024-04-30

申请号：US17650796

申请日：2022-02-11

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Ling-Yi Chuang

IPC: H01L23/48 ,  H01L21/78 ,  H01L23/00

CPC classification number: H01L24/08 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/80 ,  H01L2224/039 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05017 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05573 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/08147 ,  H01L2224/80895

Abstract: A semiconductor structure includes: a first substrate, with a first opening being provided on a surface of first substrate; and a first bonding structure positioned in the first opening. The first bonding structure includes a first metal layer and a second metal layer with a melting point lower than that of the first metal layer. The first metal layer includes a first surface in contact with a bottom surface of the first opening and a second surface opposite to the first surface, the second surface is provided with a first groove, an area, not occupied by the first metal layer and the first groove, of the first opening constitutes a second groove, the second metal layer is formed in the first groove and the second groove, and a surface, exposed from the second groove, of the second metal layer constitutes a bonding surface of the first bonding structure.

公开(公告)号：US11942025B2

公开(公告)日：2024-03-26

申请号：US17855251

申请日：2022-06-30

Applicant: Samsung Display Co., LTD.

Inventor： Jin Wan Kim ,  Seung Geun Lee ,  Sang Jo Kim ,  Su Jeong Kim ,  Young Jin Song ,  Byung Ju Lee

IPC: G09G3/32 ,  G09G3/20 ,  H01L25/18 ,  H01L27/15 ,  H01L23/00

CPC classification number: G09G3/32 ,  G09G3/2007 ,  H01L25/18 ,  H01L27/156 ,  G09G2300/0452 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/08148 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/48157 ,  H01L2224/73207 ,  H01L2224/80801 ,  H01L2224/81801

Abstract: A display device includes a substrate, a plurality of pixel electrodes on the substrate and spaced apart from each other, a plurality of light-emitting elements on the plurality of pixel electrodes, respectively, and a common electrode layer on the plurality of light-emitting elements and to which a common voltage is applied. The plurality of light-emitting elements include a first light-emitting element that is configured to emit first light according to a first driving current and a second light-emitting element that is configured to emit second light according to a second driving current. An active layer of the first light-emitting element is the same as an active layer of the second light-emitting element.

公开(公告)号：US20240014155A1

公开(公告)日：2024-01-11

申请号：US18267197

申请日：2021-11-23

Applicant: CHIPMORE TECHNOLOGY CORPORATION LIMITED ,  HEFEI CHIPMORE TECHNOLOGY CO., LTD.

Inventor： Wenjie HUANG

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/45 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05582 ,  H01L2224/05082 ,  H01L2224/05647 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05124 ,  H01L2224/05611 ,  H01L2224/85815 ,  H01L2224/45015

Abstract: The present invention provides a chip packaging structure and a chip packaging method. The chip packaging structure includes a substrate, a metal bonding pad disposed on the substrate and a metal wire, wherein the tail end of the metal wire is provided with a welding part, the welding part is welded to the metal bonding pad, the metal bonding pad is provided with a coating layer, and at least part of the welding part is located between the coating layer and the metal bonding pad. The present invention greatly improves a welding effect of the metal wire and the metal bonding pad, so that the welding of the metal wire and the metal bonding pad is more reliable and stable.

公开(公告)号：US11810878B2

公开(公告)日：2023-11-07

申请号：US17115093

申请日：2020-12-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyung Sun Jang ,  Yeo Hoon Yoon

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/02379 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03828 ,  H01L2224/03829 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/05547 ,  H01L2224/05559 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/16225 ,  H01L2924/3512

Abstract: A semiconductor package includes a semiconductor chip comprising a first surface and a second surface, a redistribution layer on the first surface of the semiconductor chip, an under bump metal (UBM) layer on the redistribution layer, and a solder bump on the UBM layer, and the solder bump covers both outer side surfaces of the UBM layer.