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公开(公告)号：US20190123140A1
公开(公告)日：2019-04-25
申请号：US16051667
申请日：2018-08-01
发明人： Pan-Jae Park , Jae-Seok Yang , Young-Hun KIM , Hae-Wang LEE , Kwan-Young CHUN
IPC分类号： H01L29/08 , H01L21/8234 , H01L29/66 , H01L27/088 , H01L27/02 , H01L29/78
摘要： A semiconductor device is provided including a substrate, a first gate structure, a first contact plug and a power rail. The substrate includes first and second cell regions extending in a first direction, and a power rail region connected to each of opposite ends of the first and second cell regions in a second direction. The first gate structure extends in the second direction from a boundary area between the first and second cell regions to the power rail region. The first contact plug is formed on the power rail region, and contacts an upper surface of the first gate structure. The power rail extends in the first direction on the power rail region, and is electrically connected to the first contact plug. The power rail supplies a turn-off signal to the first gate structure through the first contact plug to electrically insulate the first and second cell regions.
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公开(公告)号：US20240063259A1
公开(公告)日：2024-02-22
申请号：US18499436
申请日：2023-11-01
发明人： Young-Hun KIM , Jae Seok YANG , Hae Wang LEE
IPC分类号： H01L29/06 , H01L29/66 , H01L29/423 , H01L27/092 , H01L29/78 , H01L29/49
CPC分类号： H01L29/0649 , H01L29/6656 , H01L29/42376 , H01L27/0924 , H01L29/7851 , H01L29/6681 , H01L29/4916 , H01L21/76224
摘要： A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
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3.发明申请公开(公告)号：US20140269134A1
公开(公告)日：2014-09-18
申请号：US14197437
申请日：2014-03-05
发明人： Young-Hun KIM , In-Chul JEONG
IPC分类号： G11C11/406 , G11C11/408 , G11C11/401
CPC分类号： G11C11/408 , G11C7/1063 , G11C11/40611
摘要： A method of controlling a refresh operation for a memory device is disclosed. The method includes storing a first row address corresponding to a first row of a memory cell array, storing one or more second row addresses corresponding to one or more second rows of the memory cell array, the one or more second row addresses corresponding to the first row address, sequentially generating row addresses as a refresh row address during a first refresh interval, for each generated row address, when a generated row address identical to one of the one or more second row addresses is detected, stopping the generation of row addresses and sequentially outputting the one second row address and the first row address as the refresh row address, restarting the generation of the row addresses as the refresh row address after outputting the one second row address and the first row address.
摘要翻译： 公开了一种控制存储器件刷新操作的方法。 该方法包括存储对应于存储单元阵列的第一行的第一行地址，存储对应于存储单元阵列的一个或多个第二行的一个或多个第二行地址，对应于第一行地址的第一行地址 行地址，当检测到与所述一个或多个第二行地址中的一个相同的生成行地址时，针对每个生成的行地址，在第一刷新间隔期间顺序地生成行地址作为刷新行地址，停止生成行地址， 顺序地输出一个第二行地址和第一行地址作为刷新行地址，在输出一个第二行地址和第一行地址之后重新开始生成行地址作为刷新行地址。
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公开(公告)号：US20220077284A1
公开(公告)日：2022-03-10
申请号：US17526840
申请日：2021-11-15
发明人： Young-Hun KIM , Jae Seok YANG , Hae Wang LEE
IPC分类号： H01L29/06 , H01L29/66 , H01L29/423 , H01L27/092 , H01L29/78 , H01L29/49
摘要： A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
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5.发明申请SEMICONDUCTOR DEVICE HAVING HIGH-K GATE INSULATION FILMS AND FABRICATING METHOD THEREOF 审中-公开具有高K栅绝缘膜的半导体器件及其制造方法公开(公告)号：US20150325670A1
公开(公告)日：2015-11-12
申请号：US14728018
申请日：2015-06-02
发明人： Ju-Youn KIM , Young-Hun KIM
CPC分类号： H01L29/517 , H01L21/02 , H01L21/28088 , H01L21/28167 , H01L21/28194 , H01L21/823857 , H01L27/088 , H01L27/092 , H01L27/1104 , H01L29/4966 , H01L29/513 , H01L29/78
摘要： A semiconductor device having high-k gate insulation films and a method of fabricating the semiconductor device are provided. The semiconductor device includes a first gate insulation film on a substrate and the first gate insulation film includes a material selected from the group consisting of HfO2, ZrO2, Ta2O5, TiO2, SrTiO3 and (Ba,Sr)TiO3, and lanthanum (La). Additionally, the semiconductor device includes a first barrier film on the first gate insulation film, a first gate electrode on the first barrier film, and n-type source/drain regions in the substrate at both sides of the first gate electrode.
摘要翻译： 提供了具有高k栅极绝缘膜的半导体器件和制造半导体器件的方法。 半导体器件包括在衬底上的第一栅极绝缘膜，第一栅极绝缘膜包括选自HfO 2，ZrO 2，Ta 2 O 5，TiO 2，SrTiO 3和（Ba，Sr）TiO 3和镧（La）的材料。 此外，半导体器件包括第一栅极绝缘膜上的第一阻挡膜，第一阻挡膜上的第一栅极电极和第一栅电极两侧的基板中的n型源极/漏极区域。
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公开(公告)号：US20190386099A1
公开(公告)日：2019-12-19
申请号：US16214659
申请日：2018-12-10
发明人： Young-Hun KIM , Jae Seok YANG , Hae Wang LEE
IPC分类号： H01L29/06 , H01L29/66 , H01L29/423 , H01L29/49 , H01L29/78 , H01L27/092
摘要： A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
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公开(公告)号：US20180367158A1
公开(公告)日：2018-12-20
申请号：US15862794
申请日：2018-01-05
发明人： Young-Hun KIM , Yunseob SONG , Jonghwa WON , Wangseup YEUM
CPC分类号： H03M1/185 , G01R19/04 , G01R35/005 , H03G3/3078 , H03G7/08 , H03K5/003 , H03K5/1532
摘要： An electronic circuit includes a peak detector, a gain controller, and a compressor. The peak detector detects a peak level from a digital input. The gain controller outputs a digital gain with regard to increasing the peak level to a target level, The compressor provides the gain controller with a compressed gain which is to be output as the digital gain, based on the detected peak level. In a compression interval where the peak level is greater than a threshold level, the output digital gain increases as the peak level decreases. The compressor generates the compressed gain such that a ratio of an increment of the output digital gain to a decrement of the peak level in the compression interval is less than a reference ratio.
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公开(公告)号：US20140167177A1
公开(公告)日：2014-06-19
申请号：US14081543
申请日：2013-11-15
发明人： Young-Hun KIM , Ju-Youn KIM , Koung-Min RYU , Jong-Mil YOUN , Jong-Ho LEE
IPC分类号： H01L27/11 , H01L21/8238 , H01L27/092
CPC分类号： H01L27/1104 , H01L21/823807 , H01L27/092 , H01L29/1029
摘要： A semiconductor device includes a channel layer over an active region, first and second field regions adjacent the active region, and a gate structure over the channel layer and portions of the first and second field regions. The first and second field regions include grooves adjacent respective sidewalls of the channel layer, and bottom surfaces of the grooves are below a bottom surface of the channel layer.
摘要翻译： 半导体器件包括在有源区上的沟道层，与有源区相邻的第一和第二场区以及沟道层上的栅极结构以及第一和第二场区的部分。 第一和第二场区域包括与沟道层的相应侧壁相邻的沟槽，并且沟槽的底表面在沟道层的底表面下方。
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