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公开(公告)号:US10325882B2
公开(公告)日:2019-06-18
申请号:US15651933
申请日:2017-07-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Tae-woo Kang , Byung-lyul Park , Kyoung-hwan Kim , Kun-sang Park , Young-gyu Ahn
IPC: H01L23/02 , H01L25/065 , H01L21/02 , H01L21/027 , H01L21/311 , H01L21/56 , H01L21/768 , H01L23/13 , H01L23/31 , H01L23/00 , H01L25/00 , H01L23/498
Abstract: A method of manufacturing a semiconductor package includes providing a substrate including a mounting region having a recess space for accommodating a semiconductor chip and a connection region surrounding the mounting region, providing a semiconductor chip in the mounting region, the semiconductor chip including a connection pad provided on a top surface of the semiconductor chip, forming a protective layer covering a top surface of the substrate and the top surface of the semiconductor chip, forming a photosensitive insulating layer on the protective layer after forming the protective layer, patterning the photosensitive insulating layer thereby exposing the protective layer, removing the exposed protective layer, and forming a redistribution line to be electrically connected to the connection pad.
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公开(公告)号:US20180108639A1
公开(公告)日:2018-04-19
申请号:US15651933
申请日:2017-07-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Tae-woo Kang , Byung-lyul Park , Kyoung-hwan Kim , Kun-sang Park , Young-gyu Ahn
IPC: H01L25/065 , H01L21/768 , H01L25/00 , H01L21/56 , H01L21/311 , H01L23/13 , H01L23/00 , H01L21/02 , H01L21/027 , H01L23/31
CPC classification number: H01L25/0657 , H01L21/02063 , H01L21/0274 , H01L21/31111 , H01L21/31144 , H01L21/563 , H01L21/76802 , H01L21/76877 , H01L23/13 , H01L23/3135 , H01L23/3142 , H01L23/498 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/82 , H01L25/50 , H01L2224/0231 , H01L2224/08145 , H01L2224/12105 , H01L2224/13024 , H01L2224/16145 , H01L2225/06541 , H01L2225/06548 , H01L2225/06565 , H01L2225/06586 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2224/13099
Abstract: A method of manufacturing a semiconductor package includes providing a substrate including a mounting region having a recess space for accommodating a semiconductor chip and a connection region surrounding the mounting region, providing a semiconductor chip in the mounting region, the semiconductor chip including a connection pad provided on a top surface of the semiconductor chip, forming a protective layer covering a top surface of the substrate and the top surface of the semiconductor chip, forming a photosensitive insulating layer on the protective layer after forming the protective layer, patterning the photosensitive insulating layer thereby exposing the protective layer, removing the exposed protective layer, and forming a redistribution line to be electrically connected to the connection pad.
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