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公开(公告)号:US10827145B2
公开(公告)日:2020-11-03
申请号:US16703313
申请日:2019-12-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yunhong Kim , Kyung-Min Kim , Heesung Chae
Abstract: An analog to digital converting circuit includes a correlated double sampling circuit (CDS) that compares a pixel signal with a ramp signal, and outputs a comparison signal, a timing amplifier that increases an active time of the comparison signal “N” times, and outputs an extended signal, wherein the “N” is a positive integer, and a counter that outputs a digital signal corresponding to the pixel signal in response to the extended signal and a first clock signal.
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公开(公告)号:US12155945B2
公开(公告)日:2024-11-26
申请号:US17893675
申请日:2022-08-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongjun Cho , Sunyool Kang , Yunhong Kim , Heesung Chae
IPC: H04N25/709 , H01L27/146 , H04N25/74 , H04N25/76 , H04N25/772 , H04N25/78
Abstract: Disclosed is an image sensor device which includes an image pixel that outputs a reset voltage and a first data voltage through a data line, and a voltage hold circuit that is connected with the data line, stores a first voltage based on the reset voltage, and provides the data line with a second voltage based on the first voltage.
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公开(公告)号:US20240340549A1
公开(公告)日:2024-10-10
申请号:US18523624
申请日:2023-11-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangwoo Kim , Moo Young Kim , Yunhong Kim , Hyunjong Kim , Chanmin Park , Mira Lee
IPC: H04N25/709 , H04N25/76
CPC classification number: H04N25/709 , H04N25/76
Abstract: Disclosed is an image sensor device which includes a pixel that outputs a first pixel signal to a first column line during a first time period and outputs a second pixel signal to the first column line during a second time period, and a clamp circuit that outputs a first clamp signal to the first column line during the first time period. During the first time period, a voltage of the first column line is determined based on the first pixel signal and the first clamp signal. The pixel operates based on a first power supply voltage, and the clamp circuit operates based on a second power supply voltage lower than the first power supply voltage.
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4.
公开(公告)号:US20230016998A1
公开(公告)日:2023-01-19
申请号:US17824607
申请日:2022-05-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yunhong Kim , Heesung Chae , Yunhwan Jung , Haesick Sul
IPC: H04N5/378 , H04N5/3745 , H04N5/369
Abstract: An image sensor for sampling a pixel signal a plurality of times during a readout time includes an analog comparator configured to compare a signal level of the pixel signal with a signal level of a target ramp signal that is any one of a plurality of ramp signals, a counter configured to output counting data based on a comparison result of the analog comparator, and a digital comparing circuit configured to compare a binary value of a target reference code corresponding to the target ramp signal with a binary value of the counting data and determine whether to output a digital signal corresponding to the counting data to a data output circuit based on a result of the comparison between the binary value of the counting data and the binary value of the target reference code.
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公开(公告)号:US11798963B2
公开(公告)日:2023-10-24
申请号:US17119330
申请日:2020-12-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yunhong Kim , Yunhwan Jung , Heesung Chae
IPC: H01L27/146 , H04N25/75
CPC classification number: H01L27/14612 , H01L27/14636 , H01L27/14643 , H04N25/75
Abstract: An image sensor includes a substrate including an active pixel region and an inactive pixel region, having a smaller area than the active pixel region; a plurality of active pixels in the active pixel region, each of the plurality of active pixels including a first transfer transistor, a first reset transistor, a first driving transistor, and a first selection transistor; and a plurality of inactive pixels in the inactive pixel region, each of the plurality of inactive pixels including a second transfer transistor, a second reset transistor, a second driving transistor, a second selection transistor, and a switch transistor connected to a node between the second driving transistor and the second select transistor. The plurality of switch transistors, included in the plurality of inactive pixels, are connected to each other by a connection wiring.
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6.
公开(公告)号:US11709518B2
公开(公告)日:2023-07-25
申请号:US17150316
申请日:2021-01-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung-Min Kim , Haesick Sul , Sunyool Kang , Yunhong Kim , Seungmin Suh , Hyeonji Lee , Yunhwan Jung
Abstract: Disclosed is a bandgap reference circuit, which includes a first current generator that generates a first current proportional to a temperature, a second current generator that outputs a second current obtained by mirroring the first current to a first node at which a reference voltage is formed, a first resistor that is connected with the first node and is supplied with the second current, and a first bipolar junction transistor (BJT) that includes an emitter node connected with the first resistor, a base node supplied with a first power, and a collector node supplied with a second power different from the first power.
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公开(公告)号:US11489494B2
公开(公告)日:2022-11-01
申请号:US16838100
申请日:2020-04-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yunhong Kim , Youngcheol Chae
Abstract: A dynamic amplifier includes an amplifier configured to differentially amplify first and second input signals to generate first and second output signals, a bias circuit, and a variable impedance circuit. The bias circuit is connected between a first power node configured to supply a first source voltage and the amplifier, and configured to apply bias to the amplifier. The variable impedance circuit is connected between the amplifier and a second power node configured to supply a second source voltage that is lower than the first source voltage. The variable impedance circuit is configured to adjust amplification gain of the amplifier, by adjusting impedance based on a magnitude of one among the first and second input signals and the first and second output signals.
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公开(公告)号:US10587832B2
公开(公告)日:2020-03-10
申请号:US15996996
申请日:2018-06-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yunhong Kim , Kyung-Min Kim , Heesung Chae
Abstract: An analog to digital converting circuit includes a correlated double sampling circuit (CDS) that compares a pixel signal with a ramp signal, and outputs a comparison signal, a timing amplifier that increases an active time of the comparison signal “N” times, and outputs an extended signal, wherein the “N” is a positive integer, and a counter that outputs a digital signal corresponding to the pixel signal in response to the extended signal and a first clock signal.
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公开(公告)号:US20250038760A1
公开(公告)日:2025-01-30
申请号:US18596913
申请日:2024-03-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yunhong Kim , Heesung Chae , Keunyeol Park , Ingyeong Shin , Moo Young Kim
Abstract: Disclosed is an analog-to-digital converter (ADC) circuit for digitizing a pixel signal into a digital signal of positive integer (N) bits. The ADC includes a ramp generator, a clock, a comparator, and a counter. A system clock signal allows the ramp generator to generate a ramp signal and the clock generator to generate first to N-th clock signals. The comparator generates a comparison signal based on a comparison of the pixel signal, received from a pixel array, and the ramp signal. The counter includes an additional latch circuit and first to N-th latch circuits. The additional latch circuit generates an additional binary signal based on the system clock signal and the comparison signal, and the first to N-th latch circuits generate first to N-th latch signals based on the comparison signal and corresponding clock signal.
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公开(公告)号:US12143739B2
公开(公告)日:2024-11-12
申请号:US17857812
申请日:2022-07-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yunhong Kim , Yunhwan Jung , Heesung Chae , Mooyoung Kim , Haesick Sul
IPC: H04N25/75 , H04N25/63 , H04N25/633
Abstract: An image sensor may include a pixel array a pixel array including an active pixel and an optical black pixel, the active pixel configured to generate a first pixel signal, and the optical black pixel configured to generate a second pixel signal, a first biasing circuit configured to bias the first pixel signal based on a first bias voltage, a first analog-to-digital converter configured to convert the biased first pixel signal into a first digital signal, a second biasing circuit configured to bias the second pixel signal based on a second bias voltage, and a second analog-to-digital converter configured to convert the biased second pixel signal into a second digital signal, the second digital signal configured to generate smaller random noise than the first analog-to-digital converter.
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