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    Semiconductor devices comprising crack preventing layers and data storage systems including the same
    2.
    发明授权
    Semiconductor devices comprising crack preventing layers and data storage systems including the same 有权

    公开(公告)号：US12185543B2

    公开(公告)日：2024-12-31

    申请号：US17742043

    申请日：2022-05-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sanghun Chun ,  Kwangyoung Jung ,  Youngji Noh ,  Junghwan Park ,  Jeehoon Han

    IPC: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

    Abstract: A semiconductor device includes a substrate, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, channel structures penetrating the gate electrodes, extending in the first direction, and each including a channel layer, separation regions penetrating the gate electrodes, extending in the first direction and a second direction perpendicular to the first direction, and spaced apart from each other in a third direction perpendicular to the first direction and the second direction, and crack prevention layers disposed on at least a portion of the separation regions, wherein each of the separation regions includes a lower region and upper regions spaced apart from each other in the second direction on the lower region and protruding upwardly from the lower region, and wherein the crack prevention layers are in contact with upper surfaces of the upper regions.

    Semiconductor device and data storage system including the same
    3.
    发明授权
    Semiconductor device and data storage system including the same 有权

    公开(公告)号：US12131995B2

    公开(公告)日：2024-10-29

    申请号：US18370913

    申请日：2023-09-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seungyoon Kim ,  Jeongyong Sung ,  Sanghun Chun ,  Jihwan Kim ,  Sunghee Chung ,  Jeehoon Han

    IPC: H10B43/27 ,  H01L23/528 ,  H01L29/423

    CPC classification number: H01L23/5283 ,  H01L29/42356 ,  H10B43/27

    Abstract: A semiconductor device includes a pattern structure; a stack structure including gate layers stacked in a first region on the pattern structure and extending into a second region; a memory vertical structure penetrating the stack structure in the first region; gate contact plugs electrically connected to the gate layers in the second region; and a first peripheral contact plug spaced apart from the gate layers, the gate layers including a first gate layer, the gate contact plugs including a first gate contact plug electrically connected to the first gate layer, side surfaces of the first gate contact plug and the first peripheral contact plug having different numbers of upper bending portions, and the number of upper bending portions of the side surface of the first gate contact plug being greater than the number of upper bending portions of the side surface of the first peripheral contact plug.

    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20220139831A1

    公开(公告)日：2022-05-05

    申请号：US17475128

    申请日：2021-09-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seungyoon Kim ,  Jeongyong Sung ,  Sanghun Chun ,  Jihwan Kim ,  Sunghee Chung ,  Jeehoon Han

    IPC: H01L23/528 ,  H01L27/11582 ,  H01L29/423

    Abstract: A semiconductor device includes a pattern structure; a stack structure including gate layers stacked in a first region on the pattern structure and extending into a second region; a memory vertical structure penetrating the stack structure in the first region; gate contact plugs electrically connected to the gate layers in the second region; and a first peripheral contact plug spaced apart from the gate layers, the gate layers including a first gate layer, the gate contact plugs including a first gate contact plug electrically connected to the first gate layer, side surfaces of the first gate contact plug and the first peripheral contact plug having different numbers of upper bending portions, and the number of upper bending portions of the side surface of the first gate contact plug being greater than the number of upper bending portions of the side surface of the first peripheral contact plug.

    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20250008737A1

    公开(公告)日：2025-01-02

    申请号：US18882427

    申请日：2024-09-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sanghun Chun ,  Shinhwan Kang ,  Jihwan Kim ,  Jeehoon Han

    IPC: H10B43/40 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

    Abstract: A semiconductor device includes a lower structure including a peripheral circuit; a stack structure on the lower structure, extending from a memory cell array region to a stepped region, and including a gate stacked region, and an insulator stacked regions arranged in the stepped region in a first direction; a capping insulating structure on the stack structure; and separation structures passing through the gate stacked region. The stack structure includes interlayer insulating layers and horizontal layers, alternately and repeatedly stacked, the horizontal layers include gate horizontal layers and insulating horizontal layers, the gate stacked region includes the gate horizontal layers, each of the insulator stacked regions includes the insulating horizontal layers, in the stepped region, the stack structure includes a first stepped region, a connection stepped region, and a second stepped region.

    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20250014997A1

    公开(公告)日：2025-01-09

    申请号：US18892906

    申请日：2024-09-23

    Applicant: Samsung electronics Co., Ltd.

    Inventor： Seungyoon Kim ,  Jeongyong Sung ,  Sanghun Chun ,  Jihwan Kim ,  Sunghee Chung ,  Jeehoon Han

    IPC: H01L23/528 ,  H01L29/423 ,  H10B43/27

    Abstract: A semiconductor device includes a pattern structure; a stack structure including gate layers stacked in a first region on the pattern structure and extending into a second region; a memory vertical structure penetrating the stack structure in the first region; gate contact plugs electrically connected to the gate layers in the second region; and a first peripheral contact plug spaced apart from the gate layers, the gate layers including a first gate layer, the gate contact plugs including a first gate contact plug electrically connected to the first gate layer, side surfaces of the first gate contact plug and the first peripheral contact plug having different numbers of upper bending portions, and the number of upper bending portions of the side surface of the first gate contact plug being greater than the number of upper bending portions of the side surface of the first peripheral contact plug.

    Semiconductor device and data storage system including the same
    9.
    发明授权
    Semiconductor device and data storage system including the same 有权

    公开(公告)号：US11791262B2

    公开(公告)日：2023-10-17

    申请号：US17475128

    申请日：2021-09-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seungyoon Kim ,  Jeongyong Sung ,  Sanghun Chun ,  Jihwan Kim ,  Sunghee Chung ,  Jeehoon Han

    IPC: H01L23/528 ,  H01L29/423 ,  H10B43/27

    CPC classification number: H01L23/5283 ,  H01L29/42356 ,  H10B43/27

    Abstract: A semiconductor device includes a pattern structure; a stack structure including gate layers stacked in a first region on the pattern structure and extending into a second region; a memory vertical structure penetrating the stack structure in the first region; gate contact plugs electrically connected to the gate layers in the second region; and a first peripheral contact plug spaced apart from the gate layers, the gate layers including a first gate layer, the gate contact plugs including a first gate contact plug electrically connected to the first gate layer, side surfaces of the first gate contact plug and the first peripheral contact plug having different numbers of upper bending portions, and the number of upper bending portions of the side surface of the first gate contact plug being greater than the number of upper bending portions of the side surface of the first peripheral contact plug.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES, METHODS OF FABRICATING THE SAME, AND ELECTRONIC SYSTEMS INCLUDING THE SAME
    10.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES, METHODS OF FABRICATING THE SAME, AND ELECTRONIC SYSTEMS INCLUDING THE SAME 有权

    公开(公告)号：US20220216151A1

    公开(公告)日：2022-07-07

    申请号：US17537744

    申请日：2021-11-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Donghwan Kim ,  Shinhwan Kang ,  Youngji Noh ,  Jung-Hwan Park ,  Sanghun Chun

    IPC: H01L23/535 ,  H01L23/522 ,  H01L27/11582 ,  H01L27/11573

    Abstract: Disclosed are three-dimensional semiconductor memory devices, electronic systems including the same, and methods of fabricating the same. The three-dimensional semiconductor memory device includes a substrate including a cell array region and an extension region, a peripheral circuit structure including peripheral transistors on the substrate, a stack structure including interlayer dielectric layers and gate electrodes that are alternately stacked on the peripheral circuit structure, contacts that penetrate the stack structure on the extension region and are electrically connected with the peripheral transistors and include a protruding part contacting a sidewall of one of the gate electrodes and a vertical part penetrating the stack structure, and dielectric patterns between the vertical part and respective sidewalls of the gate electrodes. Top and bottom surfaces of each of the dielectric patterns are respectively in contact with adjacent ones of the interlayer dielectric layers.

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