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公开(公告)号:US10090044B2
公开(公告)日:2018-10-02
申请号:US15215862
申请日:2016-07-21
Applicant: SanDisk Technologies LLC
Inventor: Stella Achtenberg , Alon Eyal , Eran Sharon
Abstract: A memory system can program data in different modes, such as normal mode programming and burst mode programming. Burst mode programming programs data into the memory device faster than normal mode programming. MLC Blocks for burst mode programming are selected based on one or more criteria, such as block age, block programming speed, or the like. Further, one or more burst mode TRIM settings, which include one or more of a program voltage TRIM setting, a step-up voltage TRIM setting, skip verify level, and a program pulse width, are used to program the blocks selected for burst mode programming. In this regard, burst mode programming is performed more quickly than normal mode programming.
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公开(公告)号:US20180025776A1
公开(公告)日:2018-01-25
申请号:US15215862
申请日:2016-07-21
Applicant: SanDisk Technologies LLC
Inventor: Stella Achtenberg , Alon Eyal , Eran Sharon
CPC classification number: G11C11/5628 , G06F11/1072 , G11C7/1018 , G11C16/10 , G11C16/16 , G11C16/32 , G11C29/021 , G11C29/028 , G11C29/42 , G11C29/52 , G11C2029/0411 , G11C2211/5641
Abstract: Apparatus and method for performing burst mode programming in a memory system are disclosed. A memory system may program data in different modes, such as normal mode programming and burst mode programming. Burst mode programming programs data into the memory device faster than normal mode programming. MLC Blocks for burst mode programming may be selected based on one or more criteria, such as block age, block programming speed, or the like. Further, one or more burst mode TRIM settings, which may include a program voltage TRIM setting, a step-up voltage TRIM setting, skip verify level, and a program pulse width, may be used to program the blocks selected for burst mode programming. In this regard, burst mode programming may be performed more quickly than normal mode programming.
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公开(公告)号:US20180113759A1
公开(公告)日:2018-04-26
申请号:US15333440
申请日:2016-10-25
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
CPC classification number: G06F11/1068 , G06F11/10 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3459 , G11C29/52 , G11C2207/2281
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号:US10262743B2
公开(公告)日:2019-04-16
申请号:US15440185
申请日:2017-02-23
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A command is issued for performing a conditioning operation which helps to transition the memory cells so that their threshold voltages are at predictable levels. In one approach, the conditioning operation is performed by applying a voltage pulse to one or more word lines in response to a trigger, such as detecting that a duration since a last sensing operation exceeds a threshold, detecting that a duration since a last performance of the conditioning operation exceeds a threshold, or a detecting that a read command has been issued. Moreover, the peak power consumption required to perform the conditioning operation can be reduced for various configurations of a memory device on one or more die.
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公开(公告)号:US20180203762A1
公开(公告)日:2018-07-19
申请号:US15921165
申请日:2018-03-14
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
CPC classification number: G06F11/1068 , G06F11/08 , G06F11/10 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3459 , G11C29/52 , G11C2207/2281
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号:US10394649B2
公开(公告)日:2019-08-27
申请号:US15921184
申请日:2018-03-14
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
IPC: G11C29/04 , G06F11/10 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/34 , G11C29/52 , G11C11/56 , G11C16/32
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号:US09952944B1
公开(公告)日:2018-04-24
申请号:US15333440
申请日:2016-10-25
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
CPC classification number: G06F11/1068 , G06F11/10 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3459 , G11C29/52 , G11C2207/2281
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号:US10372536B2
公开(公告)日:2019-08-06
申请号:US15921165
申请日:2018-03-14
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
IPC: G11C16/28 , G06F11/10 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/34 , G11C29/52 , G11C11/56 , G11C16/32
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号:US20180203763A1
公开(公告)日:2018-07-19
申请号:US15921184
申请日:2018-03-14
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
CPC classification number: G06F11/1068 , G06F11/08 , G06F11/10 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3459 , G11C29/52 , G11C2207/2281
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.
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公开(公告)号:US20180114580A1
公开(公告)日:2018-04-26
申请号:US15440185
申请日:2017-02-23
Applicant: SanDisk Technologies LLC
Inventor: Idan Alrod , Eran Sharon , Alon Eyal , Liang Pang , Evgeny Mekhanik
CPC classification number: G11C16/26 , G11C16/0483 , G11C16/08 , G11C16/3418 , G11C16/349 , G11C2211/563
Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A command is issued for performing a conditioning operation which helps to transition the memory cells so that their threshold voltages are at predictable levels. In one approach, the conditioning operation is performed by applying a voltage pulse to one or more word lines in response to a trigger, such as detecting that a duration since a last sensing operation exceeds a threshold, detecting that a duration since a last performance of the conditioning operation exceeds a threshold, or a detecting that a read command has been issued. Moreover, the peak power consumption required to perform the conditioning operation can be reduced for various configurations of a memory device on one or more die.
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