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    Method of manufacturing a non-volatile memory device
    3.
    发明授权
    Method of manufacturing a non-volatile memory device 失效
    制造非易失性存储器件的方法

    公开(公告)号：US07947590B2

    公开(公告)日：2011-05-24

    申请号：US12588064

    申请日：2009-10-02

    申请人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    发明人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    IPC分类号： H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L27/115 ,  H01L21/764 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/792

    摘要： The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode.

    摘要翻译： 非易失性存储器件可以包括具有主体和一对翅片的半导体衬底。 桥式绝缘层可以非电连接该对翅片的上部，以限定一对翅片之间的空隙。 一对翅片的外表面是一对翅片的不面向空隙的表面，并且一对翅片的内表面是面对空隙的一对翅片的表面。 非易失性存储器件还可以包括至少一个可覆盖该对散热片的外表面的至少一部分的控制栅极电极，可以在该桥绝缘层上延伸，并且可以与该半导体衬底隔离。 至少一对栅极绝缘层可以在至少一个控制栅极电极和一对散热片之间，并且至少一对存储节点可以位于至少一对栅极绝缘层之间，并且至少一个控制 栅电极。

    Non-volatile memory device and method of manufacturing the same
    4.
    发明授权
    Non-volatile memory device and method of manufacturing the same 失效
    非易失性存储器件及其制造方法

    公开(公告)号：US07622761B2

    公开(公告)日：2009-11-24

    申请号：US11723222

    申请日：2007-03-19

    申请人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    发明人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    IPC分类号： H01L29/76

    CPC分类号： H01L27/115 ,  H01L21/764 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/792

    摘要： The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode.

    摘要翻译： 非易失性存储器件可以包括具有主体和一对翅片的半导体衬底。 桥式绝缘层可以非电连接该对翅片的上部，以限定一对翅片之间的空隙。 一对翅片的外表面是一对翅片的不面向空隙的表面，并且一对翅片的内表面是面对空隙的一对翅片的表面。 非易失性存储器件还可以包括至少一个可覆盖该对散热片的外表面的至少一部分的控制栅极电极，可以在该桥绝缘层上延伸，并且可以与该半导体衬底隔离。 至少一对栅极绝缘层可以在至少一个控制栅极电极和一对散热片之间，并且至少一对存储节点可以位于至少一对栅极绝缘层之间，并且至少一个控制 栅电极。

    Non-volatile memory device and method of manufacturing the same
    5.
    发明申请
    Non-volatile memory device and method of manufacturing the same 失效
    非易失性存储器件及其制造方法

    公开(公告)号：US20100041224A1

    公开(公告)日：2010-02-18

    申请号：US12588064

    申请日：2009-10-02

    申请人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    发明人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    IPC分类号： H01L21/28

    CPC分类号： H01L27/115 ,  H01L21/764 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/792

    摘要： The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode.

    摘要翻译： 非易失性存储器件可以包括具有主体和一对翅片的半导体衬底。 桥式绝缘层可以非电连接该对翅片的上部，以限定一对翅片之间的空隙。 一对翅片的外表面是一对翅片的不面向空隙的表面，并且一对翅片的内表面是面对空隙的一对翅片的表面。 非易失性存储器件还可以包括至少一个可覆盖该对散热片的外表面的至少一部分的控制栅极电极，可以在该桥绝缘层上延伸，并且可以与该半导体衬底隔离。 至少一对栅极绝缘层可以在至少一个控制栅极电极和一对散热片之间，并且至少一对存储节点可以位于至少一对栅极绝缘层之间，并且至少一个控制 栅电极。

    Non-volatile memory device and method of manufacturing the same
    6.
    发明申请
    Non-volatile memory device and method of manufacturing the same 失效
    非易失性存储器件及其制造方法

    公开(公告)号：US20070284648A1

    公开(公告)日：2007-12-13

    申请号：US11723222

    申请日：2007-03-19

    申请人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    发明人： Yoon-Dong Park ,  Won-Joo Kim ,  June-Mo Koo ,  Suk-Pil Kim ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L27/115 ,  H01L21/764 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/788 ,  H01L29/792

    摘要： The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode.

    摘要翻译： 非易失性存储器件可以包括具有主体和一对翅片的半导体衬底。 桥式绝缘层可以非电连接该对翅片的上部，以限定一对翅片之间的空隙。 一对翅片的外表面是一对翅片的不面向空隙的表面，并且一对翅片的内表面是面对空隙的一对翅片的表面。 非易失性存储器件还可以包括至少一个可覆盖该对散热片的外表面的至少一部分的控制栅极电极，可以在该桥绝缘层上延伸，并且可以与该半导体衬底隔离。 至少一对栅极绝缘层可以在至少一个控制栅极电极和一对散热片之间，并且至少一对存储节点可以位于至少一对栅极绝缘层之间，并且至少一个控制 栅电极。

    Semiconductor device having gate-all-around structure and method of fabricating the same
    7.
    发明申请
    Semiconductor device having gate-all-around structure and method of fabricating the same 有权
    具有栅极全绕结构的半导体器件及其制造方法

    公开(公告)号：US20070181959A1

    公开(公告)日：2007-08-09

    申请号：US11653863

    申请日：2007-01-17

    申请人： Yoon-Dong Park ,  Suk-Pil Kim

    发明人： Yoon-Dong Park ,  Suk-Pil Kim

    IPC分类号： H01L29/76

    CPC分类号： H01L29/785 ,  H01L29/42392 ,  H01L29/78639

    摘要： Semiconductor devices having a gate-all-around (GAA) structure capable of higher operating performance may be provided. A semiconductor device may include a semiconductor substrate, at least one gate electrode, and at least one gate insulating layer. The semiconductor substrate may have a body, at least one supporting post protruding from the body, and at least one pair of fins separated from the body, wherein both ends of each fin of the at least one pair of fins are connected to and supported by the at least one supporting post. The at least one gate electrode may enclose a portion of at least one fin of the at least one pair of fins of the semiconductor substrate, and may be insulated from the semiconductor substrate. The at least one gate insulating layer may be interposed between the at least one gate electrode and the at least one pair of fins of the semiconductor substrate.

    摘要翻译： 可以提供具有能够具有更高操作性能的全能（GAA）结构的半导体器件。 半导体器件可以包括半导体衬底，至少一个栅电极和至少一个栅极绝缘层。 半导体衬底可以具有本体，从主体突出的至少一个支撑柱和与主体分离的至少一对翅片，其中至少一对翅片的每个翅片的两端连接并由其支撑 所述至少一个支撑柱。 至少一个栅电极可以包围半导体衬底的至少一对散热片中的至少一个鳍片的一部分，并且可以与半导体衬底绝缘。 所述至少一个栅极绝缘层可以插入在所述至少一个栅电极和所述半导体衬底的所述至少一对鳍之间。

    Semiconductor device having gate-all-around structure and method of fabricating the same
    8.
    发明授权
    Semiconductor device having gate-all-around structure and method of fabricating the same 有权
    具有栅极全绕结构的半导体器件及其制造方法

    公开(公告)号：US07652308B2

    公开(公告)日：2010-01-26

    申请号：US11653863

    申请日：2007-01-17

    申请人： Yoon-Dong Park ,  Suk-Pil Kim

    发明人： Yoon-Dong Park ,  Suk-Pil Kim

    IPC分类号： H01L29/78

    CPC分类号： H01L29/785 ,  H01L29/42392 ,  H01L29/78639

    摘要： Semiconductor devices having a gate-all-around (GAA) structure capable of higher operating performance may be provided. A semiconductor device may include a semiconductor substrate, at least one gate electrode, and at least one gate insulating layer. The semiconductor substrate may have a body, at least one supporting post protruding from the body, and at least one pair of fins separated from the body, wherein both ends of each fin of the at least one pair of fins are connected to and supported by the at least one supporting post. The at least one gate electrode may enclose a portion of at least one fin of the at least one pair of fins of the semiconductor substrate, and may be insulated from the semiconductor substrate. The at least one gate insulating layer may be interposed between the at least one gate electrode and the at least one pair of fins of the semiconductor substrate.

    摘要翻译： 可以提供具有能够具有更高操作性能的全能（GAA）结构的半导体器件。 半导体器件可以包括半导体衬底，至少一个栅电极和至少一个栅极绝缘层。 半导体衬底可以具有本体，从主体突出的至少一个支撑柱和与主体分离的至少一对翅片，其中至少一对翅片的每个翅片的两端连接并由其支撑 所述至少一个支撑柱。 至少一个栅电极可以包围半导体衬底的至少一对散热片中的至少一个鳍片的一部分，并且可以与半导体衬底绝缘。 所述至少一个栅极绝缘层可以插入在所述至少一个栅电极和所述半导体衬底的所述至少一对鳍之间。

    Non-volatile memory devices and method thereof
    10.
    发明申请
    Non-volatile memory devices and method thereof 有权
    非易失性存储器件及其方法

    公开(公告)号：US20070103963A1

    公开(公告)日：2007-05-10

    申请号：US11490129

    申请日：2006-07-21

    申请人： Won-Joo Kim ,  Sung-Jae Byun ,  Yoon-Dong Park ,  Eun-Hong Lee ,  Suk-Pil Kim ,  Jae-Woong Hyun

    发明人： Won-Joo Kim ,  Sung-Jae Byun ,  Yoon-Dong Park ,  Eun-Hong Lee ,  Suk-Pil Kim ,  Jae-Woong Hyun

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0007 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C16/0416 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/72 ,  H01L27/11521 ,  H01L27/11568

    摘要： Non-volatile memory devices and a method thereof are provided. A non-volatile memory device according to an example embodiment of the present invention may include a first transistor including a source, a drain, and a control gate, a first storage node coupled to the first transistor, the first storage node configured to store information in a first manner, a first diode having a first end connected to the source of the transistor, the first diode configured to rectify a flow of current from the source of the transistor and a second storage node connected to a second end of the first diode, the second storage node configured to store information in a second manner. Another non-volatile memory device according to another example embodiment of the present invention may include a semiconductor substrate having a first conductivity type including an active region defined by a device isolating layer, a source region and a drain region formed by doping an impurity having a second conductivity type in the active region, a control gate electrode insulated from the active region, the control gate electrode extending across the active region disposed between the source region and the drain region, a first storage node layer interposed between the active region and the control gate electrode configured to store information in a first manner, a second storage node layer disposed on the source region configured to store information in a second manner and a diode interposed between the source region and the second storage node layer to rectify a flow of current to the source region. The example method may be directed to obtaining a higher storage capacity per cell area in either of the above-described example non-volatile memory devices.

    摘要翻译： 提供了非易失性存储器件及其方法。 根据本发明的示例性实施例的非易失性存储器件可以包括：第一晶体管，包括源极，漏极和控制栅极;耦合到第一晶体管的第一存储节点，第一存储节点，被配置为存储信息 以第一方式，第一二极管具有连接到晶体管的源极的第一端，第一二极管被配置为对来自晶体管的源极的电流进行整流，以及连接到第一二极管的第二端的第二存储节点 所述第二存储节点被配置为以第二方式存储信息。 根据本发明的另一示例性实施例的另一非易失性存储器件可以包括具有第一导电类型的半导体衬底，该第一导电类型包括由器件隔离层限定的有源区，源区和漏区， 有源区中的第二导电类型，与有源区绝缘的控制栅电极，跨越设置在源区和漏区之间的有源区延伸的控制栅电极，插入在有源区和控制区之间的第一存储节点层 栅电极，其被配置为以第一方式存储信息;第二存储节点层，被布置在源区域上，被配置为以第二方式存储信息;以及二极管，插入在源区域和第二存储节点层之间，以将电流流向 源区域。 示例性方法可以针对在上述任一示例非易失性存储器件中获得每个单元区域的更高的存储容量。