NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    非易失性半导体存储器元件,非易失性半导体存储器件及其制造非易失性半导体存储器件的方法

    公开(公告)号:US20130270510A1

    公开(公告)日:2013-10-17

    申请号:US13996203

    申请日:2012-06-18

    IPC分类号: H01L27/24 H01L45/00

    摘要: A nonvolatile semiconductor memory element includes: a variable resistance element including a first electrode, a variable resistance layer, and a second electrode, and having a resistance value which changes according to a polarity of an electric pulse applied between the first electrode and the second electrode; and a current steering element which is electrically connected to the variable resistance element, allows a current to flow bidirectionally, and has a nonlinear current-voltage characteristic. The current steering element (i) has a structure in which a first current steering element electrode, a first semiconductor layer, and a second current steering element electrode are stacked in this order, and (ii) includes a second semiconductor layer which covers side surfaces of the first current steering element electrode, the first semiconductor layer, and the second current steering element electrode.

    摘要翻译: 非易失性半导体存储元件包括:可变电阻元件,包括第一电极,可变电阻层和第二电极,并且具有根据施加在第一电极和第二电极之间的电脉冲的极性而变化的电阻值 ; 并且电连接到可变电阻元件的电流导向元件允许电流双向流动,并且具有非线性电流 - 电压特性。 当前的操舵元件(i)具有第一电流操舵元件电极,第一半导体层和第二电流操舵元件电极依次层叠的结构,(ⅱ)包括覆盖侧面的第二半导体层 的第一电流操舵元件电极,第一半导体层和第二电流操舵元件电极。

    MEMORY DEVICE, SEMICONDUCTOR STORAGE DEVICE, METHOD FOR MANUFACTURING MEMORY DEVICE, AND READING METHOD FOR SEMICONDUCTOR STORAGE DEVICE
    3.
    发明申请
    MEMORY DEVICE, SEMICONDUCTOR STORAGE DEVICE, METHOD FOR MANUFACTURING MEMORY DEVICE, AND READING METHOD FOR SEMICONDUCTOR STORAGE DEVICE 有权
    存储器件,半导体存储器件,用于制造存储器件的方法和用于半导体存储器件的读取方法

    公开(公告)号:US20130121063A1

    公开(公告)日:2013-05-16

    申请号:US13812532

    申请日:2011-09-26

    IPC分类号: H01L45/00 G11C13/00

    摘要: A memory device that can prevent degradation in characteristics of a diode and the destruction due to the miniaturization includes: a substrate; first electrodes, a second electrode, and a third electrode that are stacked above the substrate; a variable resistance layer between the first and second electrodes; and a non-conductive layer between the second and third electrodes. The variable resistance layer includes a high-concentration variable resistance layer closer to the first electrodes, and a low-concentration variable resistance layer closer to the second electrode and having an oxygen concentration lower than that of the high-concentration variable resistance layer. The second and third electrodes and the non-conductive layer comprise the diode, and the first and second electrodes and the variable resistance layer comprise variable resistance elements, a total number of which is equal to that of the first electrodes.

    摘要翻译: 可以防止二极管的特性劣化和由于小型化引起的破坏的存储器件包括:衬底; 在基板上层叠的第一电极,第二电极和第三电极; 第一和第二电极之间的可变电阻层; 以及在第二和第三电极之间的非导电层。 可变电阻层包括靠近第一电极的高浓度可变电阻层和更靠近第二电极并且氧浓度低于高浓度可变电阻层的低浓度可变电阻层的低浓度可变电阻层。 第二和第三电极和非导电层包括二极管,并且第一和第二电极和可变电阻层包括可变电阻元件,其总数等于第一电极的总数。

    Nonvolatile memory device manufacturing method
    4.
    发明授权
    Nonvolatile memory device manufacturing method 有权
    非易失性存储器件制造方法

    公开(公告)号:US08900965B2

    公开(公告)日:2014-12-02

    申请号:US13884630

    申请日:2012-03-21

    IPC分类号: H01L45/00 H01L27/24 H01L27/10

    摘要: A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper lines and which enables large capacity and high integration. This method includes: forming a variable resistance element, a contact hole and a line groove; and forming a current steering layer of a bidirectional diode element above interlayer insulating layers and a variable resistance layer to cover the line groove without covering a bottom surface of the contact hole.

    摘要翻译: 一种制造非易失性存储器件的方法,其是可变电阻非易失性存储器件,其与适合于形成细铜线的双镶嵌工艺具有良好的一致性,并且能够实现大容量和高集成度。 该方法包括:形成可变电阻元件,接触孔和线槽; 并且在层间绝缘层之上形成双向二极管元件的电流转向层和可变电阻层以覆盖线槽而不覆盖接触孔的底表面。

    NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE
    5.
    发明申请
    NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE 有权
    非易失性存储元件和非易失性存储器件

    公开(公告)号:US20100295012A1

    公开(公告)日:2010-11-25

    申请号:US12863535

    申请日:2009-11-18

    IPC分类号: H01L27/10 H01L45/00

    摘要: A nonvolatile memory element comprises a resistance variable element 105 configured to reversibly change between a low-resistance state and a high-resistance state in response to electric signals with different polarities which are applied thereto; and a current controlling element 112 configured such that when a current flowing when a voltage whose absolute value is a first value as a desired value which is larger than 0 and smaller than a predetermined voltage value and whose polarity is a first polarity is applied is a first current and a current flowing when a voltage whose absolute value is the first value and whose polarity is a second polarity different from the first polarity is applied is a second current, the first current is higher than the second current, and the resistance variable element is connected in series with the current controlling element such that a polarity of a voltage applied to the current controlling element when the resistance variable element is changed from the low-resistance state to the high-resistance state is the first polarity.

    摘要翻译: 非易失性存储元件包括电阻可变元件105,其被配置为响应于施加到其上的具有不同极性的电信号在低电阻状态和高电阻状态之间可逆地变化; 以及电流控制元件112,被配置为当施加绝对值为第一值的电压作为大于0且小于预定电压值且极性为第一极性的期望值的电流流过的电流控制元件112为 当施加绝对值为第一值且极性为与第一极性不同的第二极性的电压时的第一电流和电流是第二电流,第一电流高于第二电流,并且电阻可变元件 与电流控制元件串联连接,使得当电阻可变元件从低电阻状态改变为高电阻状态时施加到电流控制元件的电压的极性是第一极性。

    NONVOLATILE MEMORY DEVICE MANUFACTURING METHOD
    6.
    发明申请
    NONVOLATILE MEMORY DEVICE MANUFACTURING METHOD 有权
    非易失性存储器件制造方法

    公开(公告)号:US20130224931A1

    公开(公告)日:2013-08-29

    申请号:US13884630

    申请日:2012-03-21

    IPC分类号: H01L45/00

    摘要: A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper lines and which enables large capacity and high integration. This method includes: forming a variable resistance element, a contact hole and a line groove; and forming a current steering layer of a bidirectional diode element above interlayer insulating layers and a variable resistance layer to cover the line groove without covering a bottom surface of the contact hole.

    摘要翻译: 一种制造非易失性存储器件的方法,其是可变电阻非易失性存储器件,其与适合于形成细铜线的双镶嵌工艺具有良好的一致性,并且能够实现大容量和高集成度。 该方法包括:形成可变电阻元件,接触孔和线槽; 并且在层间绝缘层之上形成双向二极管元件的电流转向层和可变电阻层以覆盖线槽而不覆盖接触孔的底表面。

    Memory device, semiconductor storage device, method for manufacturing memory device, and reading method for semiconductor storage device
    7.
    发明授权
    Memory device, semiconductor storage device, method for manufacturing memory device, and reading method for semiconductor storage device 有权
    存储装置,半导体存储装置,存储装置的制造方法以及半导体存储装置的读取方法

    公开(公告)号:US08811061B2

    公开(公告)日:2014-08-19

    申请号:US13812532

    申请日:2011-09-26

    摘要: A memory device that can prevent degradation in characteristics of a diode and the destruction due to the miniaturization includes: a substrate; first electrodes, a second electrode, and a third electrode that are stacked above the substrate; a variable resistance layer between the first and second electrodes; and a non-conductive layer between the second and third electrodes. The variable resistance layer includes a high-concentration variable resistance layer closer to the first electrodes, and a low-concentration variable resistance layer closer to the second electrode and having an oxygen concentration lower than that of the high-concentration variable resistance layer. The second and third electrodes and the non-conductive layer comprise the diode, and the first and second electrodes and the variable resistance layer comprise variable resistance elements, a total number of which is equal to that of the first electrodes.

    摘要翻译: 可以防止二极管的特性劣化和由于小型化引起的破坏的存储器件包括:衬底; 在基板上层叠的第一电极,第二电极和第三电极; 第一和第二电极之间的可变电阻层; 以及在第二和第三电极之间的非导电层。 可变电阻层包括靠近第一电极的高浓度可变电阻层和更靠近第二电极并且氧浓度低于高浓度可变电阻层的低浓度可变电阻层的低浓度可变电阻层。 第二和第三电极和非导电层包括二极管,并且第一和第二电极和可变电阻层包括可变电阻元件,其总数等于第一电极的总数。

    Non-volatile semiconductor memory device and manufacturing method thereof
    8.
    发明授权
    Non-volatile semiconductor memory device and manufacturing method thereof 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号:US08551853B2

    公开(公告)日:2013-10-08

    申请号:US13498541

    申请日:2011-07-07

    IPC分类号: H01L21/20

    摘要: A non-volatile semiconductor memory device comprises a plurality of memory cell holes (101) formed through an interlayer insulating layer (80) at respective cross-points of a plurality of first wires (10) of a stripe shape and a plurality of second wires (20) of a stripe shape when viewed from above such that the memory cell holes (101) expose upper surfaces of the plurality of first wires, respectively, a plurality of dummy holes (111) formed on the plurality of first wires in the interlayer insulating layer such that the dummy holes reach the upper surfaces of the plurality of first wires, respectively, and stacked-layer structures formed inside the memory cell holes and inside the dummy holes, respectively, each of the stacked-layer structures including a first electrode (30) and a variable resistance layer (40); an area of a portion of the first wire which is exposed in a lower opening of one of the dummy holes being greater than an area of a portion of the first wire which is exposed in a lower opening of one of the memory cell holes; and one or more of the dummy holes being formed on each of the first wires.

    摘要翻译: 一种非易失性半导体存储器件包括:多条存储单元孔(101),其形成在层状绝缘层(80)的多个第一布线(10)的条状形状的各个交叉点处,多个第二布线 (101)分别暴露在所述多个第一布线的上表面的多个虚设孔(111),所述多个第一布线形成在所述中间层 绝缘层,使得所述虚拟孔分别到达所述多个第一布线的上表面,分别形成在所述存储单元孔内部和所述虚拟孔内部的堆叠层结构,所述层叠层结构中的每一个包括第一电极 (30)和可变电阻层(40); 在一个虚拟孔的下部开口中露出的第一线的一部分的面积大于暴露在一个存储单元孔的下部开口中的第一线的一部分的面积; 并且在每个第一导线上形成一个或多个虚拟孔。

    Nonvolatile memory element, and nonvolatile memory device
    9.
    发明授权
    Nonvolatile memory element, and nonvolatile memory device 有权
    非易失性存储元件和非易失性存储器件

    公开(公告)号:US08399875B1

    公开(公告)日:2013-03-19

    申请号:US13529707

    申请日:2012-06-21

    IPC分类号: H01L21/00 H01L47/00

    摘要: A nonvolatile memory element including a resistance variable element configured to reversibly change between a low-resistance state and a high-resistance state in response to electric signals with different polarities; and a current controlling element configured such that when a current flowing when a voltage whose absolute value is a first value which is larger than 0 and smaller than a predetermined voltage value and whose polarity is a first polarity is applied is a first current and a current flowing when a voltage whose absolute value is the first value and whose polarity is a second polarity is applied is a second current, the first current is higher than the second current, and the resistance variable element is connected with the current controlling element such that the first polarity voltage is applied to the current controlling element when the resistance variable element changes from the low-resistance to the high-resistance state.

    摘要翻译: 一种非易失性存储元件,包括电阻可变元件,其被配置为响应于具有不同极性的电信号在低电阻状态和高电阻状态之间可逆地变化; 以及电流控制元件,其被配置为当施加绝对值为大于0且小于预定电压值并且小于预定电压值且极性为第一极性的第一值的电流流过的电流时,是第一电流和电流 当施加绝对值为第一值并且极性为第二极性的电压时,流过第二电流,第一电流高于第二电流,并且电阻可变元件与电流控制元件连接,使得 当电阻可变元件从低电阻变为高电阻状态时,向电流控制元件施加第一极性电压。

    NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE
    10.
    发明申请
    NONVOLATILE MEMORY ELEMENT, AND NONVOLATILE MEMORY DEVICE 有权
    非易失性存储元件和非易失性存储器件

    公开(公告)号:US20130056701A1

    公开(公告)日:2013-03-07

    申请号:US13529707

    申请日:2012-06-21

    IPC分类号: H01L45/00

    摘要: A nonvolatile memory element including a resistance variable element configured to reversibly change between a low-resistance state and a high-resistance state in response to electric signals with different polarities; and a current controlling element configured such that when a current flowing when a voltage whose absolute value is a first value which is larger than 0 and smaller than a predetermined voltage value and whose polarity is a first polarity is applied is a first current and a current flowing when a voltage whose absolute value is the first value and whose polarity is a second polarity is applied is a second current, the first current is higher than the second current, and the resistance variable element is connected with the current controlling element such that the first polarity voltage is applied to the current controlling element when the resistance variable element changes from the low-resistance to the high-resistance state.

    摘要翻译: 一种非易失性存储元件,包括电阻可变元件,其被配置为响应于具有不同极性的电信号在低电阻状态和高电阻状态之间可逆地变化; 以及电流控制元件,其被配置为当施加绝对值为大于0且小于预定电压值并且小于预定电压值且极性为第一极性的第一值的电流流过的电流时,是第一电流和电流 当施加绝对值为第一值并且极性为第二极性的电压时,流过第二电流,第一电流高于第二电流,并且电阻可变元件与电流控制元件连接,使得 当电阻可变元件从低电阻变为高电阻状态时,向电流控制元件施加第一极性电压。