公开(公告)号：US20110179462A1

公开(公告)日：2011-07-21

申请号：US13021257

申请日：2011-02-04

申请人： Seiji Kubo ,  Akihiro Ebina ,  Kentaro Saito ,  Taku Matsuda

发明人： Seiji Kubo ,  Akihiro Ebina ,  Kentaro Saito ,  Taku Matsuda

IPC分类号： H04N7/173

CPC分类号： H04L43/0811 ,  H04L69/18

摘要： A communication device includes: a wired communication unit configured to communicate with an external device via a wired communication path; a wireless communication unit configured to communicate with the external device via a wireless communication path; and a communication control unit configured to select one of the wired communication unit and the wireless communication unit, and to cause the selected communication unit to communicate with the external device. The communication control unit includes a link information detecting unit configured to detect link information indicating whether the wired communication path is electrically linked up or linked down, and the communication control unit is configured to select the wireless communication unit and cause the wireless communication unit to communicate with the external device when, in a state where the wired communication unit is selected, the link information detecting unit detects a plurality of times that the wired communication path is electrically linked down.

摘要翻译： 通信装置包括：有线通信单元，被配置为经由有线通信路径与外部设备进行通信; 无线通信单元，被配置为经由无线通信路径与所述外部设备进行通信; 以及通信控制单元，被配置为选择有线通信单元和无线通信单元中的一个，并使所选择的通信单元与外部设备通信。 通信控制单元包括：链接信息检测单元，被配置为检测指示有线通信路径是电连接还是下联的链路信息，并且通信控制单元被配置为选择无线通信单元并使无线通信单元进行通信 与外部设备一起，当选择有线通信单元的状态下，链接信息检测单元检测到有线通信路径被电连接的多次。

公开(公告)号：US20100198978A1

公开(公告)日：2010-08-05

申请号：US11911066

申请日：2006-07-11

申请人： Yuki Kobayashi ,  Kentaro Saito ,  Taku Matsuda ,  Kenji Shioyama

发明人： Yuki Kobayashi ,  Kentaro Saito ,  Taku Matsuda ,  Kenji Shioyama

IPC分类号： G06F15/16

CPC分类号： H04L49/351 ,  H04L12/2838 ,  H04L49/20 ,  H04L2012/284

摘要： A communication data processing apparatus which distributes streaming data and other general data other than the streaming data obtained via a network to a decoder and a CPU respectively, and which is configured to be independent from the CPU, includes: a communication data obtaining unit (31) which obtains communication data from a PHY (20) that transmits and receives a physical signal to and from the network; a frame sorting unit (33) which partitions the obtained communication data into frames and sorts specific frames which include streaming data, out of the respective partitioned frames; a streaming data output unit (35) which outputs the streaming data that is included in the sorted specific frames to a decoder (40); and a general frame output unit (36) which outputs general frames other than the sorted specific frames to a MAC (51) that performs data link processing.

摘要翻译： 一种通信数据处理装置，其将分配了经由网络获得的流数据以外的流数据和其他通用数据分别分配给解码器和CPU，并且被配置为与CPU独立，该通信数据处理装置包括：通信数据获取单元 ），其从发送和接收来自网络的物理信号的PHY（20）获取通信数据; 帧分类单元，其将所获得的通信数据划分成帧，并且从各个分割帧中分离包括流数据的特定帧; 流式数据输出单元（35），其将包括在排序的特定帧中的流数据输出到解码器（40）; 以及将执行数据链接处理的MAC（51）输出除了所分类的特定帧以外的一般帧的通用帧输出部（36）。

公开(公告)号：US20080192742A1

公开(公告)日：2008-08-14

申请号：US11915956

申请日：2006-07-18

申请人： Yuki Kobayashi ,  Kentaro Saito ,  Taku Matsuda ,  Kenji Shioyama

发明人： Yuki Kobayashi ,  Kentaro Saito ,  Taku Matsuda ,  Kenji Shioyama

IPC分类号： H04L12/56

CPC分类号： H04L47/10 ,  H04L47/2416 ,  H04L47/2441 ,  H04L49/90 ,  H04L69/12 ,  H04L69/22

摘要： A communication control apparatus (101) receiving packets transmitted via a network (1) includes a packet classifying unit (112) which classifies the received packets into either a first type packet including streaming data streaming-delivered or a second type packet not including the streaming data, based on protocol identifier information and a port number included in each of the received packets, and a bus I/F (113) which transfers the streaming data to a first memory area assigned to a main memory (104) and the second type packet to a second memory area assigned to the main memory (104), the second memory area being different from the first memory area.

摘要翻译： 接收经由网络（1）发送的分组的通信控制装置（101）包括分组分类单元（112），其将接收到的分组分类成包括流传输的流数据流的第一类型分组或不包括流传输的第二类分组 数据，基于协议标识符信息和包含在每个接收到的分组中的端口号，以及总线I / F（113​​），其将流传输数据传送到分配给主存储器（104）的第一存储区域，并且第二类型 分组到分配给主存储器（104）的第二存储器区域，第二存储器区域与第一存储器区域不同。

公开(公告)号：US20060271955A1

公开(公告)日：2006-11-30

申请号：US10553901

申请日：2004-05-26

申请人： Kentaro Saito ,  Taku Matsuda ,  Yuki Kobayashi

发明人： Kentaro Saito ,  Taku Matsuda ,  Yuki Kobayashi

IPC分类号： H04N5/445 ,  G06F3/00 ,  G06F13/00

CPC分类号： H04N21/4821 ,  H04N5/44543 ,  H04N7/162 ,  H04N21/482 ,  H04N21/84

摘要： A program information display device is capable of using an electronic program guide using arbitrary attributes as axes of scatter diagram displaying program information, and allowing to find a desired program easily. Also, a program information display device has an electronic program guide capable of displaying program information at high degree of freedom without restriction of discrete layout. The program information display device is a program information display device for displaying program information in a scatter diagram disposed at a position conforming to related value about attribute of X-axis and related value about attribute of Y-axis, comprising program information storage, program information processing, program information display, and attribute input.

摘要翻译： 节目信息显示装置能够使用使用任意属性的电子节目指南作为散点图显示节目信息的轴，并且容易地找到期望的节目。 此外，节目信息显示装置具有能够以高自由度显示节目信息而不限制离散布局的电子节目指南。 节目信息显示装置是用于在散布图中显示节目信息的节目信息显示装置，该散点图被设置在符合关于X轴属性的相关值和关于Y轴属性的相关值的位置，包括节目信息存储，节目信息 处理，程序信息显示和属性输入。

公开(公告)号：US07863670B2

公开(公告)日：2011-01-04

申请号：US12490147

申请日：2009-06-23

申请人： Yasushi Ishii ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

发明人： Yasushi Ishii ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

IPC分类号： H01L29/792

CPC分类号： H01L27/115 ,  H01L21/823462 ,  H01L27/0629 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L29/6653

摘要： In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.

摘要翻译： 在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。 控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于 存储器栅极的栅极长度大于1.控制栅极和栅电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是形成的单层结构 同时作为控制栅极的电极材料膜8A。

公开(公告)号：US07745288B2

公开(公告)日：2010-06-29

申请号：US11717053

申请日：2007-03-13

申请人： Koichi Toba ,  Yasushi Ishii ,  Yoshiyuki Kawashima ,  Satoru Machida ,  Munekatsu Nakagawa ,  Kentaro Saito ,  Toshikazu Matsui ,  Takashi Hashimoto ,  Kosuke Okuyama

发明人： Koichi Toba ,  Yasushi Ishii ,  Yoshiyuki Kawashima ,  Satoru Machida ,  Munekatsu Nakagawa ,  Kentaro Saito ,  Toshikazu Matsui ,  Takashi Hashimoto ,  Kosuke Okuyama

IPC分类号： H01L21/336

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11526 ,  H01L27/11531 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7885

摘要： A semiconductor device having a non-volatile memory is disclosed, whose disturb defect can be diminished or prevented. A memory cell of the non-volatile memory has a memory gate electrode formed over a main surface of a semiconductor substrate through an insulating film for charge storage. A first side wall is formed on a side face of the memory gate electrode, and at a side face of the first side wall, a second side wall is formed. On an upper surface of an n+-type semiconductor region for source in the memory cell there is formed a silicide layer whose end portion on the memory gate electrode MG side is defined by the second side wall.

摘要翻译： 公开了一种具有非易失性存储器的半导体器件，其干扰缺陷可被减弱或防止。 非易失性存储器的存储单元具有通过用于电荷存储的绝缘膜形成在半导体衬底的主表面上的存储栅电极。 第一侧壁形成在存储栅电极的侧面上，在第一侧壁的侧面形成有第二侧壁。 在存储单元中用于源极的n +型半导体区域的上表面上形成硅化物层，其存储栅极电极MG侧的端部由第二侧壁限定。

公开(公告)号：US20070262382A1

公开(公告)日：2007-11-15

申请号：US11727591

申请日：2007-03-27

申请人： Yasushi Ishii ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

发明人： Yasushi Ishii ,  Takashi Hashimoto ,  Yoshiyuki Kawashima ,  Koichi Toba ,  Satoru Machida ,  Kozo Katayama ,  Kentaro Saito ,  Toshikazu Matsui

IPC分类号： H01L27/12 ,  H01L27/01 ,  H01L31/0392 ,  H01L21/8234 ,  H01L21/336

CPC分类号： H01L27/115 ,  H01L21/823462 ,  H01L27/0629 ,  H01L27/0922 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  H01L29/6653

摘要： In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.

摘要翻译： 在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。 控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于 存储器栅极的栅极长度大于1.控制栅极和栅极电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是单层 结构与控制门的电极材料膜8A同时形成。

公开(公告)号：US07130559B2

公开(公告)日：2006-10-31

申请号：US10995988

申请日：2004-11-22

申请人： Hiroyuki Kimura ,  Masao Hayashi ,  Yoichi Takaragi ,  Kentaro Saito ,  Hiroshi Kaburagi ,  Toshikazu Sekizawa ,  Akio Ito

发明人： Hiroyuki Kimura ,  Masao Hayashi ,  Yoichi Takaragi ,  Kentaro Saito ,  Hiroshi Kaburagi ,  Toshikazu Sekizawa ,  Akio Ito

IPC分类号： G03G15/00

CPC分类号： G03G15/553 ,  G03G15/55 ,  G03G21/181 ,  G03G21/1878 ,  G03G2215/00987

摘要： A recycling system for managing reusable units to be used in an image-forming apparatus (e.g., MFP device including units, the system comprising inputting kind information of the units), storing use information corresponding to the image-forming apparatus, and determining a reuse level of a reusable unit to be provided based on the kind information and the use information.

摘要翻译： 一种用于管理图像形成装置中使用的可复用单元的回收系统（例如，包括单元的MFP设备，包括输入单元的种类信息的系统），存储与图像形成装置相对应的使用信息，以及确定再利用 基于种类信息和使用信息提供的可重复使用单元的级别。

公开(公告)号：US20050117918A1

公开(公告)日：2005-06-02

申请号：US10995988

申请日：2004-11-22

申请人： Hiroyuki Kimura ,  Masao Hayashi ,  Yoichi Takaragi ,  Kentaro Saito ,  Hiroshi Kaburagi ,  Toshikazu Sekizawa ,  Akio Ito

发明人： Hiroyuki Kimura ,  Masao Hayashi ,  Yoichi Takaragi ,  Kentaro Saito ,  Hiroshi Kaburagi ,  Toshikazu Sekizawa ,  Akio Ito

IPC分类号： G03G21/00 ,  B41J29/38 ,  G03G15/00 ,  G03G21/18 ,  G06Q50/00 ,  G06Q50/04 ,  G06Q50/10

CPC分类号： G03G15/553 ,  G03G15/55 ,  G03G21/181 ,  G03G21/1878 ,  G03G2215/00987

摘要： A recycling system for managing reusable units to be used in an image-forming apparatus (e.g., MFP device including units, the system comprising inputting kind information of the units, storing use information corresponding to the image-forming apparatus, and determining a reuse level of a reusable unit to be provided based on the kind information and the use information.

摘要翻译： 一种用于管理图像形成装置中使用的可复用单元的回收系统（例如，包括单元的MFP设备，该系统包括输入单元的种类信息，存储与图像形成装置相对应的使用信息，以及确定重用级别 基于种类信息和使用信息来提供可重复使用单元。

公开(公告)号：US09159843B2

公开(公告)日：2015-10-13

申请号：US13476356

申请日：2012-05-21

申请人： Kentaro Saito ,  Kazumasa Yanagisawa ,  Yasushi Ishii ,  Koichi Toba

发明人： Kentaro Saito ,  Kazumasa Yanagisawa ,  Yasushi Ishii ,  Koichi Toba

IPC分类号： H01L29/778 ,  H01L21/336 ,  H01L29/792 ,  H01L21/28 ,  H01L27/115 ,  H01L29/423 ,  H01L29/66 ,  G11C16/04

CPC分类号： H01L29/792 ,  G11C16/0466 ,  H01L21/28282 ,  H01L27/11573 ,  H01L29/4234 ,  H01L29/66833

摘要： To improve the electric performance and reliability of a semiconductor device. A memory gate electrode of a split gate type nonvolatile memory is a metal gate electrode formed from a stacked film of a metal film 6a and a silicon film 6b over the metal film 6a. In an upper end part of the metal film 6a, a metal oxide portion 17 is formed by oxidation of a part of the metal film 6a. A control gate electrode of the split gate type nonvolatile memory is a metal gate electrode formed from a stacked film of a metal film 4a and the silicon film 4b over the metal film 4a.

摘要翻译： 提高半导体器件的电气性能和可靠性。 分闸式非易失性存储器的存储栅极是由金属膜6a上的金属膜6a和硅膜6b的叠层膜形成的金属栅电极。 在金属膜6a的上端部分，通过氧化金属膜6a的一部分而形成金属氧化物部分17。 分闸式非易失性存储器的控制栅电极是由金属膜4a的叠层膜和金属膜4a上的硅膜4b形成的金属栅电极。