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1.发明授权公开(公告)号：US10431601B2
公开(公告)日：2019-10-01
申请号：US16039334
申请日：2018-07-19
Inventor： Chuanzhi Xu , Zhengfang Xie , Xiongping Li , Xiaoyang Tong
IPC: G02F1/1343 , H01L27/12 , G02F1/1368 , H01L21/441 , H01L21/467 , H01L29/24 , H01L29/423 , H01L29/66 , H01L29/786 , G02F1/1362
Abstract: A method for manufacturing an array substrate, and an array substrate, a display panel and a display device are provided. The method may include: forming, on one side of a substrate, a gate electrode layer, a gate insulation layer and a semiconductor layer, wherein the gate electrode layer has a same pattern as the semiconductor layer; forming an etching stop layer on the semiconductor layer; forming a first, second hole and third through holes by patterning the etching stop layer; forming a source electrode layer and a drain electrode layer on the etching stop layer, wherein the source electrode layer is electrically connected with the semiconductor layer via the first through hole, and the drain electrode layer is electrically connected with the semiconductor layer via the second through hole; forming an active layer by etching the semiconductor layer at the location corresponding to the third through hole.
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公开(公告)号：US20230133786A1
公开(公告)日：2023-05-04
申请号：US18146517
申请日：2022-12-27
Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
Inventor： Xiaodong Yang , Meng Qu , Ye Yan , Lu Xie , Jiandong Wang , Xiongping Li , Shengchao Ji
IPC: H10K59/124 , G02F1/1362 , G02F1/1343 , G06F3/041
Abstract: A display panel, a method for manufacturing the display panel, and a display apparatus are described. In an embodiment, the display panel includes a display area and a non-display area; a substrate; an organic layer located at a side of the substrate and located in the display area and the non-display area, in which the organic layer includes a first portion located in the non-display area; and an organic layer protection structure located on a surface of the organic layer facing away from the substrate. In an embodiment, the organic layer protection structure includes a first structure in the display area and a second structure in the non-display area. In an embodiment, the second structure overlaps the first portion in a direction perpendicular to a plane of the substrate. In an embodiment, the first structure and the second structure are in direct contact with the organic layer.
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3.发明授权公开(公告)号：US11315502B2
公开(公告)日：2022-04-26
申请号：US16933335
申请日：2020-07-20
Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
Inventor： Xiongping Li , Xiaoping Sun , Lihua Wang , Conghua Ma , Qiang Dong
IPC: G09G3/32 , G09G3/34 , G02F1/13357 , G02F1/1335
Abstract: A backlight drive method, a backlight drive device, a backlight source system, and a display device are provided in the present disclosure. The backlight drive method is used to drive a light-emitting region of a backlight source of the display device. Driving the light-emitting region of the backlight source includes acquiring actual ambient brightness of an ambient where the display device is located. Driving the light-emitting region of the backlight source further includes determining a target backlight brightness range of light exited from the light-emitting region with reference to the actual ambient brightness, where the target backlight brightness range is within an intrinsic brightness range of the light-emitting region. Driving the light-emitting region of the backlight source further includes matching the target backlight brightness range to a plurality of gray levels preset in the light-emitting region.
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公开(公告)号：US11060908B1
公开(公告)日：2021-07-13
申请号：US16845577
申请日：2020-04-10
Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
Inventor： Kan Wang , Yang Nan , Xiongping Li , Xiaoping Sun , Meilin Wang
IPC: G09G3/34 , G01J1/46 , G09G5/10 , H01L27/12 , H01L27/144 , H01L31/113 , H01L31/0224 , H01L31/02 , H01L31/0216 , G01J1/44
Abstract: A display module and a method for monitoring backlight brightness are provided in the present disclosure. The display module includes a display region including an opening region and a non-opening region. The display module includes a backlight module and an array substrate. The array substrate is at a light-exiting side of the backlight module. The array substrate includes a plurality of gate lines which extends along a first direction and is arranged along a second direction, and further includes a plurality of data signal lines which is arranged along the first direction and extends along the second direction. The array substrate further includes a first substrate and at least one photosensitive unit, where the photosensitive unit is at a side of the first substrate away from the backlight module; and the photosensitive unit is disposed at the non-opening region for sensing a luminous brightness of the backlight module.
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Patent Agency Ranking
5.发明申请公开(公告)号：US20180323221A1
公开(公告)日：2018-11-08
申请号：US16039334
申请日：2018-07-19
Inventor： Chuanzhi Xu , Zhengfang Xie , Xiongping Li , Xiaoyang Tong
IPC: H01L27/12 , H01L29/786 , H01L29/66 , H01L29/423 , H01L29/24 , G02F1/1343 , H01L21/441 , H01L21/467 , G02F1/1368 , G02F1/1362
CPC classification number: H01L27/1225 , G02F1/134309 , G02F1/13439 , G02F1/1368 , G02F2001/136231 , G02F2201/122 , H01L21/441 , H01L21/467 , H01L27/127 , H01L27/1288 , H01L29/24 , H01L29/42356 , H01L29/66969 , H01L29/7869
Abstract: A method for manufacturing an array substrate, and an array substrate, a display panel and a display device are provided. The method may include: forming, on one side of a substrate, a gate electrode layer, a gate insulation layer and a semiconductor layer, wherein the gate electrode layer has a same pattern as the semiconductor layer; forming an etching stop layer on the semiconductor layer; forming a first, second hole and third through holes by patterning the etching stop layer; forming a source electrode layer and a drain electrode layer on the etching stop layer, wherein the source electrode layer is electrically connected with the semiconductor layer via the first through hole, and the drain electrode layer is electrically connected with the semiconductor layer via the second through hole; forming an active layer by etching the semiconductor layer at the location corresponding to the third through hole.
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公开(公告)号：US20150062478A1
公开(公告)日：2015-03-05
申请号：US14231449
申请日：2014-03-31
Inventor： Xuewen ZHAO , Xiongping Li , Zhonghua Wang
CPC classification number: G02F1/1309 , G02F1/13458 , H01L27/124
Abstract: Embodiments of the present invention disclose a TFT array substrate, a display panel and a display device. Gap directions of gaps formed between visual test pads in a visual test area on the TFT array substrate are staggered with the alignment direction of an alignment film on the same plane with at least one staggered angle, and the staggered angle is more than 5 degrees, so that the problem of Rubbing Mura is solved.
Abstract translation: 本发明的实施例公开了TFT阵列基板，显示面板和显示装置。 在TFT阵列基板上的视觉测试区域中的可视测试区之间形成的间隙的间隙方向与取向膜在同一平面上的取向方向以至少一个交错角交错，并且交错角大于5度， 以便解决穆拉摩擦的问题。
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公开(公告)号：US12032234B2
公开(公告)日：2024-07-09
申请号：US18108711
申请日：2023-02-13
Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
Inventor： Zhiyuan Zhang , Xintong Ling , Fan Tian , Xiongping Li
IPC: G02F1/13 , F21V8/00 , G02F1/1333 , G02F1/1335 , G02F1/13363 , G02F1/1343 , G02F1/1347
CPC classification number: G02F1/1323 , G02B6/0053 , G02F1/13338 , G02F1/133514 , G02F1/133528 , G02F1/13363 , G02F1/134309 , G02F1/1347 , G02F2413/02
Abstract: Anti-peep display assembly and display device are provided. The anti-peep display assembly includes a backlight module, a first birefringence control type liquid crystal cell, a second birefringence control type liquid crystal cell, and a display liquid crystal cell. Along a thickness direction of the anti-peep display assembly, the first birefringence control type liquid crystal cell and the second birefringence control type liquid crystal cell are between the backlight module and the display liquid crystal cell, and the first birefringence control type liquid crystal cell is between the second birefringence control type liquid crystal cell and the backlight module. A first polarizer is arranged on a side of the display liquid crystal cell away from the second birefringence control type liquid crystal cell, and a second polarizer is arranged between the display liquid crystal cell and the second birefringence control type liquid crystal cell.
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8.发明授权公开(公告)号：US10056410B2
公开(公告)日：2018-08-21
申请号：US15403131
申请日：2017-01-10
Inventor： Chuanzhi Xu , Zhengfang Xie , Xiongping Li , Xiaoyang Tong
IPC: H01L27/12 , G02F1/1343 , G02F1/1368 , H01L21/441 , H01L21/467 , H01L29/24 , H01L29/423 , H01L29/66 , H01L29/786 , G02F1/1362
CPC classification number: H01L27/1225 , G02F1/134309 , G02F1/13439 , G02F1/1368 , G02F2001/136231 , G02F2201/122 , H01L21/441 , H01L21/467 , H01L27/127 , H01L27/1288 , H01L29/24 , H01L29/42356 , H01L29/66969 , H01L29/7869
Abstract: A method for manufacturing an array substrate, and an array substrate, a display panel and a display device are provided. The method may include: forming, on one side of a substrate, a gate electrode layer, a gate insulation layer and a semiconductor layer, wherein the gate electrode layer has a same pattern as the semiconductor layer; forming an etching stop layer on the semiconductor layer; forming a first, second hole and third through holes by patterning the etching stop layer; forming a source electrode layer and a drain electrode layer on the etching stop layer, wherein the source electrode layer is electrically connected with the semiconductor layer via the first through hole, and the drain electrode layer is electrically connected with the semiconductor layer via the second through hole; forming an active layer by etching the semiconductor layer at the location corresponding to the third through hole.
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9.发明申请公开(公告)号：US20170148825A1
公开(公告)日：2017-05-25
申请号：US15403131
申请日：2017-01-10
Inventor： Chuanzhi Xu , Zhengfang Xie , Xiongping Li , Xiaoyang Tong
IPC: H01L27/12 , H01L21/441 , H01L29/423 , G02F1/1368 , H01L29/66 , H01L29/786 , G02F1/1343 , H01L21/467 , H01L29/24
CPC classification number: H01L27/1225 , G02F1/134309 , G02F1/13439 , G02F1/1368 , G02F2001/136231 , G02F2201/122 , H01L21/441 , H01L21/467 , H01L27/127 , H01L27/1288 , H01L29/24 , H01L29/42356 , H01L29/66969 , H01L29/7869
Abstract: A method for manufacturing an array substrate, and an array substrate, a display panel and a display device are provided. The method may include: forming, on one side of a substrate, a gate electrode layer, a gate insulation layer and a semiconductor layer, wherein the gate electrode layer has a same pattern as the semiconductor layer; forming an etching stop layer on the semiconductor layer; forming a first, second hole and third through holes by patterning the etching stop layer; forming a source electrode layer and a drain electrode layer on the etching stop layer, wherein the source electrode layer is electrically connected with the semiconductor layer via the first through hole, and the drain electrode layer is electrically connected with the semiconductor layer via the second through hole; forming an active layer by etching the semiconductor layer at the location corresponding to the third through hole.
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