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公开(公告)号:US20180219031A1
公开(公告)日:2018-08-02
申请号:US14897763
申请日:2015-10-28
Inventor: Peng DU
IPC: H01L27/12 , G02F1/1345 , G02F1/1362
CPC classification number: H01L27/1255 , G02F1/1345 , G02F1/136286 , G02F1/1368 , G02F2001/13629 , H01L24/02 , H01L27/124 , H01L2224/02331 , H01L2224/0235 , H01L2224/02375 , H01L2224/02379
Abstract: Provided is a fan-out structure and an electronic device. In the fan-out structure, first fan-out lines are located on a different metal layer from second fan-out lines, and vertical projections of the first fan-out lines on the second metal layer partially overlap with the second fan-out lines, so as to form capacitance between the first fan-out lines and the second fan-out lines. The display effects of a display panel can be remarkably improved while a frame of the electronic device is favorably narrowed.
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公开(公告)号:US20180157079A1
公开(公告)日:2018-06-07
申请号:US14897672
申请日:2015-10-14
Inventor: Peng DU , Lixuan CHEN
IPC: G02F1/1368 , G02F1/1362 , G02F1/1333
CPC classification number: G02F1/1368 , G02F1/133345 , G02F1/134309 , G02F1/136209 , G02F1/136227 , G02F1/136286 , G02F2001/134372 , G02F2201/121 , G02F2202/104
Abstract: Provided is an LTPS array substrate and a liquid crystal display panel, wherein the LTPS array substrate comprises: a first common electrode layer; a passivation layer, which is formed on the first common electrode layer, and has a first via hole formed therein; a pixel electrode layer, which is formed on the passivation layer; and a second common electrode layer, which is formed on the passivation layer, located between pixel electrodes corresponding to two adjacent sub-pixels in the pixel electrode layer, electrically isolated from the pixel electrode layer, and electrically connected to the first common electrode layer through the first via hole. The array substrate is capable of significantly enhancing the intensity of an electric field at an edge region of the adjacent sub-pixels, thereby increasing the transmittance at this region.
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公开(公告)号:US20170263202A1
公开(公告)日:2017-09-14
申请号:US14908066
申请日:2015-12-29
Inventor: Peng DU
IPC: G09G3/36
CPC classification number: G09G3/3677 , G02F1/1345 , G09G2300/0426 , G09G2300/0439 , G09G2300/0809 , G09G2310/0205 , G09G2310/0251 , G09G2310/0286 , G09G2320/028 , G11C19/28
Abstract: The present disclosure discloses a scan driving circuit on an array substrate which includes a multi-stage cascade circuit, each stage of the cascade circuit inputs a clock signal corresponding to a current stage, and outputs an current stage scanning signal and a current stage cascade signal, different stages of the cascade circuit are connected with each other via a cascade signal; a plurality of cancellation circuits, each cancellation circuit is corresponding to one stage of the cascade circuit, the cancellation circuit corresponding to the current stage cascade circuit inputs a clock signal corresponding to an adjacent stage cascade circuit, and outputs a cancellation signal to offset a part of the current stage scanning signal outputted from the current stage cascade circuit, so that the scanning signals outputted from two adjacent stages of the cascade circuit are not overlapped. An array substrate is also disclosed in the present disclosure.
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公开(公告)号:US20170194508A1
公开(公告)日:2017-07-06
申请号:US15058173
申请日:2016-03-02
Inventor: Peng DU , Cheng-hung CHEN
IPC: H01L29/786 , H01L29/66
CPC classification number: H01L22/34 , H01L22/14 , H01L27/1244 , H01L27/127 , H01L29/66742 , H01L29/78609 , H01L29/78648 , H01L29/78696
Abstract: A thin-film transistor (TFT) switch includes a gate, a drain, a source, a semiconductor layer, and a fourth electrode. The drain is connected to a first signal. The gate is connected to a control signal to control the switch on or off. The source outputs the first signal when the switch turns on. The fourth electrode and the gate are respectively located at two sides of the semiconductor layer. The fourth electrode is conductive and is selectively coupled to different voltage levels, thereby reducing leakage current in a channel to improve switch characteristic when the switch turns off.
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公开(公告)号:US20170153505A1
公开(公告)日:2017-06-01
申请号:US14780623
申请日:2015-07-23
Inventor: Peng DU , Ming-hung SHIH , Chih-tsung KANG , Je-hao HSU , Qibiao LV , Xiaohui YAO
IPC: G02F1/1343 , G02F1/1362 , H01L27/12 , G02F1/1368
CPC classification number: G02F1/134309 , G02F1/136213 , G02F1/136286 , G02F1/1368 , G02F2001/134345 , G02F2201/121 , G02F2201/123 , H01L27/124 , H01L27/1255
Abstract: In the present disclosure, one TFT substrate and a liquid crystal panel are disclosed. The TFT substrate includes a plurality of pixel cells, and each of the pixel cells includes three sub-pixel cells. Within one pixel cell, at least one sub-pixel includes single pixel area. Each of the other pixel cells includes two isolated pixel areas, and brightness of the at least two isolated pixel areas being different. In view of the above, the performance of the liquid crystal panel is enhanced when the viewing angle is large. In addition, the transmission rate of the liquid crystal panel may be maintained to be higher, which saves the power consumption of the backlight module so as to save the energy.
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公开(公告)号:US20170141139A1
公开(公告)日:2017-05-18
申请号:US14762458
申请日:2015-06-17
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
IPC: H01L27/12 , H01L29/786 , H01L29/66
CPC classification number: H01L27/1288 , H01L27/124 , H01L27/1248 , H01L29/66765 , H01L29/78618 , H01L29/78678
Abstract: An LTPS array substrate and a method for producing the same are proposed. The method includes: forming a gate of a thin-film transistor (TFT) of the LTPS array substrate on a substrate; forming a first insulating layer, a semiconductor layer, and a positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a second insulating layer on the substrate of the polycrystalline silicon layer; forming a source and a drain of the TFT on the second insulating layer so that the source and the drain is electrically connected to the polycrystalline silicon layer via a contact hole. The use of masks in types and in numbers in the LTPS technology will be reduced. So, both of the processes and the production costs are reduced.
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公开(公告)号:US20170139293A1
公开(公告)日:2017-05-18
申请号:US14759225
申请日:2015-06-12
Inventor: Peng DU
IPC: G02F1/1362 , G02F1/1335 , G02F1/1333 , G02F1/1368
CPC classification number: G02F1/136209 , G02F1/133345 , G02F1/133512 , G02F1/133514 , G02F1/136286 , G02F1/1368 , G02F2001/13685 , G02F2201/123 , G02F2201/52 , G02F2202/10 , G02F2203/01
Abstract: A liquid crystal panel and an array substrate are disclosed. The liquid crystal panel includes an array substrate, a color filter substrate and a liquid crystal layer. The array substrate includes multiple scanning lines, multiple data lines, multiple pixel units, a light-shading layer and multiple pixel units formed inside multiple pixel areas surrounded by the multiple scanning lines and the multiple data lines intersected with each other. Each pixel unit respectively includes a top-gate thin-film transistor and a pixel electrode. The light-shading layer is located right below the multiple data lines for preventing two sides of each data line from leaking light. The present invention can prevent the two sides of each data line from leaking light, increase a relative positional precision of the light-shading layer and data lines in order to further decrease a width of the light-shading layer, and increase the aperture ratio and the light transmittance ratio.
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公开(公告)号:US20170075158A1
公开(公告)日:2017-03-16
申请号:US14893489
申请日:2015-09-29
IPC: G02F1/1345 , G02F1/1362 , G02F1/1368
CPC classification number: G02F1/13452
Abstract: The invention discloses a liquid crystal display device and its display panel. The display panel includes: a display region; a fan-out region, which is connected to at least one side of the display region; the fan-out region includes at least one group of fan-out wires, each group of the fan-out wires includes a plurality of wires, the wires include a first layer of metal wires and a second layer of metal wires that are disposed alternately, a part of the first layer of metal wires and the second layer of metal wires that are adjacent is overlapped. By the method above, the invention can reduce RC delay between the wires of each group of fan-out wires and improve display quality.
Abstract translation: 本发明公开了一种液晶显示装置及其显示面板。 显示面板包括:显示区域; 与所述显示区域的至少一侧连接的扇出区域; 扇出区域包括至少一组扇出线,每组扇出线包括多根导线,该线包括第一层金属线和交替布置的第二金属线层 第一层金属线的一部分和相邻的金属线的第二层重叠。 通过上述方法,本发明可以减少每组扇出线的电线之间的RC延迟并提高显示质量。
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公开(公告)号:US20160322019A1
公开(公告)日:2016-11-03
申请号:US14777170
申请日:2015-01-22
Inventor: Peng DU
IPC: G09G5/00
CPC classification number: G09G5/003 , G09G3/20 , G09G2300/0413 , G09G2300/0426 , G09G2300/08 , G09G2300/0819 , G09G2330/04
Abstract: The present embodiment is provided for a circuit of display panel, wherein comprising a signal wire extending along the first direction, a public electrode wire extending along the second direction, a pixel electrode, the first discharge circuit and the second discharge circuit, each signal wire is electrical connecting with the public electrode wire with the first discharge circuit and the second discharge circuit, the first discharge circuit and the second discharge circuit is in series, the pixel electrode is connecting on the intersection point between the first discharge circuit and the second discharge circuit.
Abstract translation: 本实施例用于显示面板的电路,其特征在于,包括沿着第一方向延伸的信号线,沿着第二方向延伸的公共电极线,像素电极,第一放电电路和第二放电电路,每条信号线 与公共电极线与第一放电电路和第二放电电路电连接,第一放电电路和第二放电电路串联,像素电极在第一放电电路和第二放电之间的交点连接 电路。
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公开(公告)号:US20160255339A1
公开(公告)日:2016-09-01
申请号:US14387748
申请日:2014-07-05
Inventor: Peng DU
CPC classification number: H04N13/359 , G09G3/003 , G09G3/20 , G09G3/2003 , G09G2300/0443 , G09G2300/0452 , G09G2320/0209 , H04N13/315 , H04N13/324 , H04N13/337 , H04N13/356 , H04N13/398
Abstract: The present invention discloses a display panel, which comprises a pixel array panel and a control circuit. In the pixel array panel, at least two pixels are arranged in a matrix form along a second direction. A first white sub-pixel and a second white sub-pixel in the pixel are arranged along a first direction. At least one of red sub-pixel, green sub-pixel, and blue sub-pixel exists between the first white sub-pixel and the second white sub-pixel. The display panel of the present invention can avoid crosstalk occurred when a stereoscopic image is displayed.
Abstract translation: 本发明公开了一种显示面板,其包括像素阵列面板和控制电路。 在像素阵列面板中,沿着第二方向以矩阵形式布置至少两个像素。 像素中的第一白色子像素和第二白色子像素沿第一方向排列。 在第一白色子像素和第二白色子像素之间存在红色子像素,绿色子像素和蓝色子像素中的至少一个。 本发明的显示面板可以避免在显示立体图像时发生串扰。
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