公开(公告)号：US06930906B2

公开(公告)日：2005-08-16

申请号：US10387869

申请日：2003-03-14

申请人： Shigeharu Matsushita ,  Yoh Takano ,  Satoru Sekine

发明人： Shigeharu Matsushita ,  Yoh Takano ,  Satoru Sekine

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： A ferroelectric memory capable of improving disturbance resistance in a non-selected memory cell includes a bit line, a word line arranged to intersect with the bit line, and a memory cell, which is arranged between the bit line and the word line an includes a ferroelectric capacitor and a diode serially connected to the ferroelectric capacitor. Thus, when a voltage in a range hardly feeding a current to the diode is applied to a non-selected cell in data writing or data reading, substantially no voltage is applied to the ferroelectric capacitor.

摘要翻译： 能够提高未选择存储单元中的抗干扰性的铁电存储器包括位线，布置成与位线相交的字线以及布置在位线和字线a之间的存储单元，包括： 铁电电容器和串联连接到铁电电容器的二极管。 因此，当在数据写入或数据读取中向非选择单元施加难以向二极管供给电流的范围内的电压时，基本上不向铁电体电容器施加电压。

公开(公告)号：US06891742B2

公开(公告)日：2005-05-10

申请号：US10480247

申请日：2002-07-12

申请人： Yoh Takano ,  Shigeharu Matsushita

发明人： Yoh Takano ,  Shigeharu Matsushita

IPC分类号： G11C11/00 ,  H01L27/02 ,  H01L27/105 ,  H01L27/11 ,  H01L27/112 ,  H01L27/115 ,  H01L27/22 ,  H01L45/00 ,  G11C11/22

CPC分类号： H01L27/0207 ,  G11C11/005 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11 ,  H01L27/1116 ,  H01L27/112 ,  H01L27/11286 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11509 ,  H01L27/228 ,  H01L27/24

摘要： A semiconductor memory device having a first memory including a bit line, a word line arranged to intersect with the bit line and a storage unit arranged between the bit line and the word line, and a second memory different in type from the first memory. The first memory and the second memory are formed on a semiconductor substrate in a stacked manner reducing the thickness in the height direction and attaining further miniaturization (thinning). Further, no wire having a large parasitic capacitance or solder is employed for connecting the first memory and the second memory, thereby enabling high-speed data transfer between the first memory and the second memory.

摘要翻译： 一种具有第一存储器的半导体存储器件，包括位线，布置成与位线交叉的字线和布置在位线和字线之间的存储单元，以及与第一存储器不同类型的第二存储器。 第一存储器和第二存储器以堆叠的方式形成在半导体衬底上，从而减小了高度方向的厚度并进一步小型化（变薄）。 此外，没有使用具有大的寄生电容或焊料的电线来连接第一存储器和第二存储器，从而使得能够在第一存储器和第二存储器之间进行高速数据传送。

公开(公告)号：US06977402B2

公开(公告)日：2005-12-20

申请号：US10802786

申请日：2004-03-18

申请人： Kazunari Honma ,  Shigeharu Matsushita

发明人： Kazunari Honma ,  Shigeharu Matsushita

IPC分类号： H01L27/105 ,  G11C11/15 ,  G11C11/22 ,  H01L21/02 ,  H01L21/82 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/108 ,  H01L27/115 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L28/65 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： A memory includes a first electrode film, a storage material film formed on the first electrode film, provided with a storage part and a thin-film part having a thickness smaller than a thickness of the storage part and which is at least about 15% of the thickness of the storage part on average, a second electrode film formed on the storage part of the storage material film. The thickness of the thin-film part may be between 15% and 95% of the thickness of the storage part. An insulator film may be formed on the thin-film part and the second electrode part, the insulator film formed on the thin-film part having a same pattern as the thin-film part.

摘要翻译： 存储器包括：第一电极膜，形成在第一电极膜上的存储材料膜，设置有存储部分和具有小于存储部分的厚度的厚度的薄膜部分，并且其厚度小于存储部分的厚度的至少约15％ 平均存储部分的厚度，形成在存储材料膜的存储部分上的第二电极膜。 薄膜部分的厚度可以在存储部件的厚度的15％至95％之间。 可以在薄膜部分和第二电极部分上形成绝缘体膜，在薄膜部分上形成的绝缘膜具有与薄膜部分相同的图案。

公开(公告)号：US5982023A

公开(公告)日：1999-11-09

申请号：US951160

申请日：1997-10-15

申请人： Shigeharu Matsushita ,  Emi Fujii ,  Daijiro Inoue

发明人： Shigeharu Matsushita ,  Emi Fujii ,  Daijiro Inoue

IPC分类号： H01L21/285 ,  H01L21/338 ,  H01L21/76 ,  H01L29/812 ,  H01L29/06 ,  H01L29/80 ,  H01L31/0328

CPC分类号： H01L29/66871 ,  H01L21/28587 ,  H01L21/7605 ,  H01L29/812

摘要： A dummy gate is removed together with an SiO.sub.2 film thereon by lift-off to form a reverse dummy-gate pattern with the SiO.sub.2 film. A photoresist pattern is formed to cover the reverse dummy-gate pattern and an SiN protection film therebetween, and a mesa pattern is formed by mesa etching. The photoresist pattern is etched so that the edge of the photoresist pattern is located between the edge of the mesa pattern and the edge of the reverse dummy-gate pattern and the exposed part of the SiN protection film is etched. The edge of the SiN protection film is thus located inside the edge of the mesa pattern.

摘要翻译： 通过剥离将虚拟栅极与其上的SiO 2膜一起除去，以形成具有SiO 2膜的反虚拟栅极图案。 形成光致抗蚀剂图案以覆盖其间的反虚拟栅极图案和SiN保护膜，并且通过台面蚀刻形成台面图案。 蚀刻光致抗蚀剂图案，使得光致抗蚀剂图案的边缘位于台面图案的边缘和反虚拟栅极图案的边缘之间，并且SiN保护膜的暴露部分被蚀刻。 因此，SiN保护膜的边缘位于台面图案的边缘内。

公开(公告)号：US07933161B2

公开(公告)日：2011-04-26

申请号：US11509057

申请日：2006-08-24

申请人： Hideaki Miyamoto ,  Shigeharu Matsushita

发明人： Hideaki Miyamoto ,  Shigeharu Matsushita

IPC分类号： G11C7/20

CPC分类号： G11C11/22

摘要： A memory capable of preventing a memory cell from disappearance of data resulting from accumulated disturbances is obtained. This memory comprises a nonvolatile memory cell and a refresh portion for rewriting data in the memory cell. The refresh portion reads data from and rewrites data in the memory cell in a power-down state.

摘要翻译： 获得能够防止存储器单元从累积干扰导致的数据消失的存储器。 该存储器包括非易失性存储器单元和用于重写存储单元中的数据的刷新部分。 刷新部分在掉电状态下从存储器单元读取数据并重新写入数据。

公开(公告)号：US07379323B2

公开(公告)日：2008-05-27

申请号：US11524273

申请日：2006-09-21

申请人： Hideaki Miyamoto ,  Shigeharu Matsushita

发明人： Hideaki Miyamoto ,  Shigeharu Matsushita

IPC分类号： G11C11/22 ,  G11C11/406 ,  G06F12/00 ,  G06F13/00

CPC分类号： G11C11/22

摘要： This memory comprises a first frequency detecting portion detecting access frequencies with respect to a plurality of memory cell blocks respectively, a comparator comparing the access frequencies with respect to the plurality of memory cell blocks detected by the first frequency detecting portion with each other and a refresh portion exercising control for selecting a prescribed memory cell block from among the plurality of memory cell blocks on the basis of comparison data output from the comparator and preferentially rewriting data in the memory cells included in the selected memory cell block.

摘要翻译： 该存储器包括分别检测相对于多个存储单元块的存取频率的第一频率检测部分，比较第一频率检测部分检测到的与多个存储单元块相关的存取频率的比较器和刷新 基于从比较器输出的比较数据，从多个存储单元块中选择规定的存储单元块的部分运动控制，并优先地重写在所选择的存储单元块中包括的存储单元中的数据。

公开(公告)号：US20060063279A1

公开(公告)日：2006-03-23

申请号：US11260243

申请日：2005-10-28

申请人： Kazunari Honma ,  Shigeharu Matsushita

发明人： Kazunari Honma ,  Shigeharu Matsushita

IPC分类号： H01L21/00 ,  H01L29/94

CPC分类号： H01L28/65 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： A method of fabricating a memory capable of improving the strength of a signal read from a memory cell is provided. This method of fabricating a memory comprises steps of forming a storage part and an etched thin-film part by partially etching a storage material film formed on a first electrode film by a prescribed thickness, forming an insulator film to cover at least the thin-film part of the storage material film and patterning the insulator film and the thin-film part of the storage material film by forming an etching mask on a prescribed region of the insulator film and thereafter etching the insulator film and the thin-film part of the storage material film through the etching mask.

摘要翻译： 提供一种制造能够提高从存储单元读取的信号的强度的存储器的方法。 这种制造存储器的方法包括以下步骤：通过将形成在第一电极膜上的存储材料膜部分地蚀刻预定厚度来形成存储部分和蚀刻的薄膜部分，形成绝缘膜以至少覆盖薄膜 部分储存材料膜，并通过在绝缘膜的规定区域上形成蚀刻掩模，然后蚀刻绝缘膜和存储材料的薄膜部分来对绝缘膜和存储材料膜的薄膜部分进行图案化 材料膜通过蚀刻掩模。

公开(公告)号：US06762476B2

公开(公告)日：2004-07-13

申请号：US10060260

申请日：2002-02-01

申请人： Shigeharu Matsushita ,  Tatsurou Gueshi

发明人： Shigeharu Matsushita ,  Tatsurou Gueshi

IPC分类号： H01L2900

CPC分类号： H01L28/60 ,  H01L28/55

摘要： A dielectric element capable of attaining excellent element characteristics by suppressing an oxide dielectric film from deterioration of characteristics caused by hydrogen is obtained. This dielectric element comprises a lower electrode including a first conductor film containing a metal, silicon and nitrogen, a first insulator film including the oxide dielectric film and an upper electrode including a second conductor film containing the metal, silicon and nitrogen, while the metal includes at least one metal selected from a group consisting of Ir, Pt, Ru, Re, Ni, Co and Mo. According to this structure, the first conductor film and the second conductor film function as barrier films preventing diffusion of hydrogen. Consequently, the first conductor film and the second conductor film suppress hydrogen from diffusing into the oxide dielectric film. Thus, the oxide dielectric film is prevented from deterioration of characteristics.

摘要翻译： 获得能够通过抑制氧化物电介质膜由氢引起的特性劣化而获得优异元素特性的电介质元件。 该电介质元件包括下电极，其包括含有金属，硅和氮的第一导体膜，包括氧化物电介质膜的第一绝缘膜和包括含有金属，硅和氮的第二导体膜的上电极，而金属包括 选自由Ir，Pt，Ru，Re，Ni，Co和Mo组成的组中的至少一种金属。根据该结构，第一导体膜和第二导体膜用作阻止氢扩散的阻挡膜。 因此，第一导体膜和第二导体膜抑制氢扩散到氧化物介电膜中。 因此，防止了氧化物介电膜的特性劣化。

公开(公告)号：US07297559B2

公开(公告)日：2007-11-20

申请号：US11260243

申请日：2005-10-28

申请人： Kazunari Honma ,  Shigeharu Matsushita

发明人： Kazunari Honma ,  Shigeharu Matsushita

IPC分类号： H01L21/00

CPC分类号： H01L28/65 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/57

摘要： A method of fabricating a memory capable of improving the strength of a signal read from a memory cell is provided. This method of fabricating a memory comprises steps of forming a storage part and an etched thin-film part by partially etching a storage material film formed on a first electrode film by a prescribed thickness, forming an insulator film to cover at least the thin-film part of the storage material film and patterning the insulator film and the thin-film part of the storage material film by forming an etching mask on a prescribed region of the insulator film and thereafter etching the insulator film and the thin-film part of the storage material film through the etching mask.

摘要翻译： 提供一种制造能够提高从存储单元读取的信号的强度的存储器的方法。 这种制造存储器的方法包括以下步骤：通过将形成在第一电极膜上的存储材料膜部分地蚀刻预定厚度来形成存储部分和蚀刻的薄膜部分，形成绝缘膜以至少覆盖薄膜 部分储存材料膜，并通过在绝缘膜的规定区域上形成蚀刻掩模，然后蚀刻绝缘膜和存储材料的薄膜部分来对绝缘膜和存储材料膜的薄膜部分进行图案化 材料膜通过蚀刻掩模。

公开(公告)号：US20070237016A1

公开(公告)日：2007-10-11

申请号：US11630851

申请日：2005-06-16

申请人： Hideaki Miyamoto ,  Naofumi Sakai ,  Kouichi Yamada ,  Shigeharu Matsushita

发明人： Hideaki Miyamoto ,  Naofumi Sakai ,  Kouichi Yamada ,  Shigeharu Matsushita

IPC分类号： G11C7/00

CPC分类号： G11C11/22

摘要： A memory wherein any “disturb effect” can be suppressed in which data in unselected memory cells are lost. This memory has a memory cell array(1) including bit lines, word lines, which are disposed to intersect the bit lines, and memory cells(12) each connected between bit and word lines. In this memory, an access operation, which includes at least one of read, rewrite and write operations, is made to a selected memory cell(12). During this access operation, it is performed to apply to the memory cell(12) a first voltage pulse, which provides an electrical field in a first direction so as to invert a stored data, and a second voltage pulse, which provides as electrical field in the opposite direction to the first one so as not to invert the stored data. In addition, a recovery operation for recovering a residual polarization amount is made to the memory cell(12).

摘要翻译： 可以抑制其中未选择的存储单元中的数据丢失的任何“干扰效应”的存储器。 该存储器具有存储单元阵列（1），该存储单元阵列（1）包括位线，设置成与位线相交的字线以及每个连接在位线和字线之间的存储单元（12）。 在该存储器中，对选择的存储器单元（12）进行包括读取，重写和写入操作中的至少一个的访问操作。 在该访问操作期间，执行向存储器单元（12）施加第一电压脉冲，该第一电压脉冲在第一方向上提供电场以反转存储的数据，以及第二电压脉冲，其提供为电场 与第一个方向相反的方向，以便不反转存储的数据。 此外，对存储单元（12）进行用于恢复残留极化量的恢复操作。