公开(公告)号：US08438724B2

公开(公告)日：2013-05-14

申请号：US12900175

申请日：2010-10-07

申请人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

发明人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

IPC分类号： H05K3/30 ,  H01L21/82

CPC分类号： H05K3/4647 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/525 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/81208 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2224/83101 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/351 ,  H05K3/4652 ,  H05K2203/0369 ,  Y10T29/4913 ,  Y10T29/49156 ,  H01L2924/00

摘要： Methods for producing a substrate for mounting a device and for producing a semiconductor module are provided. The methods comprise preparing a metal plate on one major surface of which a plurality of projected electrodes are provided. An insulating resin layer is formed on the major surface so as to cover the top surface of the projected electrodes. The top surface of at least one of the plurality of projected electrodes is exposed by removing the insulating resin layer so that a major surface of the insulating resin layer opposite to the metal plate is level. A plurality of counter electrodes is arranged having a counterface to face the top face of the plurality of projected electrodes or a semiconductor device having a plurality of device electrodes is arranged to face the top face of the plurality of projected electrodes. The at least one of the plurality of projected electrodes, the top surface of which is exposed, is electrically connected with at least one of the plurality of counter electrodes facing the projected electrodes, by pressure-bonding the metal plate with the counter electrode. A wiring layer is formed by selectively removing the metal plate.

摘要翻译： 提供了用于制造用于安装装置的基板和用于制造半导体模块的方法。 所述方法包括在一个主表面上准备金属板，其上设置有多个突起电极。 在主表面上形成绝缘树脂层以覆盖突起电极的顶表面。 通过去除绝缘树脂层使多个突起电极中的至少一个的顶表面暴露，使得与金属板相对的绝缘树脂层的主表面水平。 多个相对电极被布置成具有面对多个突出电极的顶面的相对面，或者具有多个器件电极的半导体器件被布置成面对多个突出电极的顶面。 通过将金属板与对电极压接，多个突出电极中的至少一个突出电极的顶表面被暴露，与多个对置电极中的至少一个面向突出的电极电连接。 通过选择性地去除金属板形成布线层。

公开(公告)号：US08363419B2

公开(公告)日：2013-01-29

申请号：US12667031

申请日：2008-06-24

申请人： Yoh Takano

发明人： Yoh Takano

IPC分类号： H05K1/18

CPC分类号： H05K1/0231 ,  H01L23/142 ,  H01L23/50 ,  H01L23/642 ,  H01L24/45 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/01012 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K1/056 ,  H05K3/284 ,  H05K3/4046 ,  H05K2201/09554 ,  H05K2201/10287 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

摘要： An insulating resin layer (30) is formed on a metal substrate (20), and a wiring is formed on the insulating resin layer (30). A circuit composed of a circuit element (50) and a passive element (60) is formed on the wiring (40), and the metal substrate (20) is covered with an over coat (80) and a sealing resin member (90). The insulating resin layer (30) is provided with an opening (31) so that a part of the metal substrate (20) is exposed therefrom. The exposed part of the metal substrate (20) is connected to one terminal of a capacitor (62) through a conductive wire (42), and the other terminal of the capacitor (62) is connected to the ground potential.

摘要翻译： 绝缘树脂层（30）形成在金属基板（20）上，并且在绝缘树脂层（30）上形成布线。 在布线（40）上形成由电路元件（50）和无源元件（60）构成的电路，金属基板（20）被覆盖（80）和密封树脂部件（90）覆盖， 。 绝缘树脂层（30）设置有开口（31），使金属基板（20）的一部分露出。 金属基板（20）的露出部分通过导线（42）连接到电容器（62）的一个端子，电容器（62）的另一个端子连接到地电位。

公开(公告)号：US20110027945A1

公开(公告)日：2011-02-03

申请号：US12900175

申请日：2010-10-07

申请人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

发明人： Kouichi Saitou ,  Yoshio Okayama ,  Yoh Takano ,  Mayumi Nakasato

IPC分类号： H01L21/50 ,  H05K3/02

CPC分类号： H05K3/4647 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/48 ,  H01L23/49827 ,  H01L23/525 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/81208 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2224/83101 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/351 ,  H05K3/4652 ,  H05K2203/0369 ,  Y10T29/4913 ,  Y10T29/49156 ,  H01L2924/00

摘要： A substrate for mounting a device comprises: an insulating resin layer; a plurality of projected electrodes that are connected electrically to a wiring layer provided on one major surface of the insulating resin layer, and that project toward the insulating resin layer from the wiring layer; and a counter electrode provided at a position corresponding to each of the plurality of projected electrodes on the other major surface of the insulating resin layer. Among the projected electrodes, a projected length of part of the projected electrodes is smaller than that of the other projected electrodes; and the projected electrode and the counter electrode corresponding thereto are capacitively-coupled, and the projected electrode and the counter electrode are connected electrically.

摘要翻译： 用于安装装置的基板包括：绝缘树脂层; 多个突起电极，其电连接到设置在所述绝缘树脂层的一个主表面上的布线层，并且从所述布线层向所述绝缘树脂层突出; 以及设置在与绝缘树脂层的另一个主表面上的多个突出电极中的每一个对应的位置处的对置电极。 在投影电极中，部分投影电极的投影长度小于其他投射电极的投影长度; 并且对应于其的投影电极和对电极电容耦合，并且投影电极和对电极电连接。

公开(公告)号：US20060067139A1

公开(公告)日：2006-03-30

申请号：US11281492

申请日：2005-11-18

申请人： Naofumi Sakai ,  Yoh Takano

发明人： Naofumi Sakai ,  Yoh Takano

IPC分类号： G11C5/14

CPC分类号： G11C11/22 ,  G11C7/02 ,  G11C7/12

摘要： A memory capable of suppressing disturbance is provided. This memory comprises a bit line, a word line arranged to intersect with the bit line and first storage means connected between the bit line and the word line, and applies prescribed reverse voltages to at least non-selected first storage means connected to a non-selected word line substantially identical times respectively or substantially applies no voltage through a read operation and a rewrite operation.

摘要翻译： 提供了能够抑制干扰的存储器。 该存储器包括位线，布置成与位线相交的字线和连接在位线和字线之间的第一存储装置，并且向至少未选择的第一存储装置施加规定的反向电压， 选择的字线大致相同的时间或者通过读取操作和重写操作基本上不施加电压。

公开(公告)号：US07016217B2

公开(公告)日：2006-03-21

申请号：US10792926

申请日：2004-03-05

申请人： Naofumi Sakai ,  Yoh Takano

发明人： Naofumi Sakai ,  Yoh Takano

IPC分类号： G11C11/22

CPC分类号： G11C11/22 ,  G11C7/02 ,  G11C7/12

摘要： A memory capable of suppressing disturbance is provided. This memory comprises a bit line, a word line arranged to intersect with the bit line and first storage means connected between the bit line and the word line, and applies prescribed reverse voltages to at least non-selected first storage means connected to a non-selected word line substantially identical times respectively or substantially applies no voltage through a read operation and a rewrite operation.

公开(公告)号：US20140038008A1

公开(公告)日：2014-02-06

申请号：US13983050

申请日：2012-01-11

申请人： Kouichi Saitou ,  Ryosuke Usui ,  Yoh Takano

发明人： Kouichi Saitou ,  Ryosuke Usui ,  Yoh Takano

IPC分类号： H01M10/50

CPC分类号： H01M10/647 ,  H01M2/206 ,  H01M10/613

摘要： A battery cell module includes a plurality of battery cells arranged to each other, bus bars used to connect external terminals of the plurality of battery cells, and separators provided between adjacent battery cells. Each battery cell includes an electrode body, a casing that houses the electrode body, and external terminals, provided external to the casing, which are electrically connected to the electrode body. The separator includes a heat transfer section that performs heat transfer between the heat section and the battery cell and an insulator that electrically insulates between the heat transfer section and the battery cell. The heat transfer section has a thermal conductivity higher than that of the insulator.

摘要翻译： 电池单元模块包括彼此配置的多个电池单元，用于连接多个电池单元的外部端子的汇流条以及设置在相邻电池单元之间的隔板。 每个电池单元包括电极体，容纳电极体的壳体和设置在壳体外部的外部端子，其电连接到电极体。 分离器包括在热部和电池单元之间进行热传递的传热部和在传热部和电池单元之间电绝缘的绝缘体。 传热部的导热系数比绝缘体高。

公开(公告)号：US20100188059A1

公开(公告)日：2010-07-29

申请号：US12667031

申请日：2008-06-24

申请人： Yoh Takano

发明人： Yoh Takano

IPC分类号： G05F1/10 ,  H02M3/06

CPC分类号： H05K1/0231 ,  H01L23/142 ,  H01L23/50 ,  H01L23/642 ,  H01L24/45 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/01012 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K1/056 ,  H05K3/284 ,  H05K3/4046 ,  H05K2201/09554 ,  H05K2201/10287 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

摘要： An insulating resin layer (30) is formed on a metal substrate (20), and a wiring is formed on the insulating resin layer (30). A circuit composed of a circuit element (50) and a passive element (60) is formed on the wiring (40), and the metal substrate (20) is covered with an over coat (80) and a sealing resin member (90). The insulating resin layer (30) is provided with an opening (31) so that a part of the metal substrate (20) is exposed therefrom. The exposed part of the metal substrate (20) is connected to one terminal of a capacitor (62) through a conductive wire (42), and the other terminal of the capacitor (62) is connected to the ground potential.

摘要翻译： 绝缘树脂层（30）形成在金属基板（20）上，并且在绝缘树脂层（30）上形成布线。 在布线（40）上形成由电路元件（50）和无源元件（60）构成的电路，金属基板（20）被覆盖（80）和密封树脂部件（90）覆盖， 。 绝缘树脂层（30）设置有开口（31），使金属基板（20）的一部分露出。 金属基板（20）的露出部分通过导线（42）连接到电容器（62）的一个端子，电容器（62）的另一个端子连接到地电位。

公开(公告)号：US20080080217A1

公开(公告)日：2008-04-03

申请号：US11863660

申请日：2007-09-28

申请人： Yoh Takano

发明人： Yoh Takano

IPC分类号： H02M3/18

CPC分类号： H02M3/073

摘要： A circuit device includes: a first booster circuit, started by a predetermined input voltage, which converts the input voltage into a first boosted voltage higher than the input voltage; a capacitor, connected to the booster circuit, which charges the first boosted voltage; a second booster circuit, connected to the capacitor via a first switch element and started by a storage voltage in the capacitor, which converts the input voltage into a second boosted voltage higher than the first boosted voltage; and a second switch element which connects an output terminal of the second booster circuit with the capacitor. The first switch element turns on to start the second booster circuit so as to supply the storage voltage in the capacitor to the second booster circuit. After the second booster circuit has been started, the first switch element turns off to stop supplying the storage voltage. After the second booster circuit has been started, the second switch element turns on to supply the second boosted voltage to the capacitor.

摘要翻译： 电路装置包括：以预定的输入电压启动的第一升压电路，其将输入电压转换成高于输入电压的第一升压电压; 连接到升压电路的电容器，其对第一升压电压进行充电; 第二升压电路，经由第一开关元件连接到电容器，并通过电容器中的存储电压启动，其将输入电压转换成高于第一升压电压的第二升压电压; 以及将第二升压电路的输出端子与电容器连接的第二开关元件。 第一开关元件导通以启动第二升压电路，以将电容器中的存储电压提供给第二升压电路。 在第二升压电路起动之后，第一开关元件关闭以停止提供存储电压。 在第二升压电路起动之后，第二开关元件导通，将第二升压电压提供给电容器。

公开(公告)号：US07283796B2

公开(公告)日：2007-10-16

申请号：US09991749

申请日：2001-11-26

申请人： Yoh Takano ,  Fumihiro Sasaki

发明人： Yoh Takano ,  Fumihiro Sasaki

IPC分类号： H04B1/18

CPC分类号： H03J1/0075 ,  G11C16/30 ,  H03J7/285 ,  H03L7/187 ,  H04B1/16

摘要： An electronic tuning system includes an electronic tuner for adjusting the predetermined control voltage of a voltage controlled oscillator (VCO) to tune the local frequency signal to radio waves on an arbitrary channel in accordance with channel selection information. A booster circuit boosts a source voltage to generate a boosted voltage in order to ensure the predetermined control voltage. A non-volatile memory stores the channel selection information in response to a predetermined write voltage. The boosted voltage of the booster circuit is utilized as the predetermined write voltage.

摘要翻译： 电子调谐系统包括用于调节压控振荡器（VCO）的预定控制电压的电子调谐器，以根据信道选择信息将本地频率信号调谐到任意信道上的无线电波。 升压电路提高电源电压以产生升压电压，以确保预定的控制电压。 非易失性存储器响应于预定的写入电压存储频道选择信息。 升压电路的升压电压被用作预定的写入电压。

公开(公告)号：US06891742B2

公开(公告)日：2005-05-10

申请号：US10480247

申请日：2002-07-12

申请人： Yoh Takano ,  Shigeharu Matsushita

发明人： Yoh Takano ,  Shigeharu Matsushita

IPC分类号： G11C11/00 ,  H01L27/02 ,  H01L27/105 ,  H01L27/11 ,  H01L27/112 ,  H01L27/115 ,  H01L27/22 ,  H01L45/00 ,  G11C11/22

CPC分类号： H01L27/0207 ,  G11C11/005 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11 ,  H01L27/1116 ,  H01L27/112 ,  H01L27/11286 ,  H01L27/115 ,  H01L27/11502 ,  H01L27/11509 ,  H01L27/228 ,  H01L27/24

摘要： A semiconductor memory device having a first memory including a bit line, a word line arranged to intersect with the bit line and a storage unit arranged between the bit line and the word line, and a second memory different in type from the first memory. The first memory and the second memory are formed on a semiconductor substrate in a stacked manner reducing the thickness in the height direction and attaining further miniaturization (thinning). Further, no wire having a large parasitic capacitance or solder is employed for connecting the first memory and the second memory, thereby enabling high-speed data transfer between the first memory and the second memory.

摘要翻译： 一种具有第一存储器的半导体存储器件，包括位线，布置成与位线交叉的字线和布置在位线和字线之间的存储单元，以及与第一存储器不同类型的第二存储器。 第一存储器和第二存储器以堆叠的方式形成在半导体衬底上，从而减小了高度方向的厚度并进一步小型化（变薄）。 此外，没有使用具有大的寄生电容或焊料的电线来连接第一存储器和第二存储器，从而使得能够在第一存储器和第二存储器之间进行高速数据传送。