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    Dry liquid analysis element
    1.
    发明授权
    Dry liquid analysis element 失效
    干液分析元件

    公开(公告)号：US5122451A

    公开(公告)日：1992-06-16

    申请号：US286359

    申请日：1988-12-19

    申请人： Mitsutoshi Tanaka ,  Niroyuki Hosoi ,  Teppei Ikeda ,  Shigeru Nagatomo

    发明人： Mitsutoshi Tanaka ,  Niroyuki Hosoi ,  Teppei Ikeda ,  Shigeru Nagatomo

    IPC分类号： G01N33/52

    CPC分类号： G01N33/525 ,  Y10S435/805 ,  Y10S435/97

    摘要： A dry multilayer analysis element which allows easy permeation of a high molecular weight component or hydrophobic component, which has, in order, at least a water permeable porous reagent layer, a water permeable light reflecting/screen layer, and a water permeable porous spreading layer on a water-impermeable transparent support, a reagent composition capable of producing an optically detectable substance in the presence of a component to be detected being incorporated in at least one of the water-permeable layers including said reagent layer, said light reflecting/screen layer being porous and comprised microcapsules having a core containing light reflective/screen grains and a shell made of a high molecular weight compound, wherein each of said reagent layer, spreading layer, and reflecting/screen layer allows permeation of a high molecular weight or hydrophobic component therethrough.

    Element for analyzing body fluids
    2.
    发明授权
    Element for analyzing body fluids 失效
    元素分析体液

    公开(公告)号：US5023052A

    公开(公告)日：1991-06-11

    申请号：US300123

    申请日：1989-01-23

    申请人： Shigeru Nagatomo ,  Mitsutoshi Tanaka

    发明人： Shigeru Nagatomo ,  Mitsutoshi Tanaka

    IPC分类号： G01N31/22 ,  C12Q1/00 ,  G01N33/52

    CPC分类号： G01N33/525 ,  Y10S435/805

    摘要： A multi-layer analytical element for analyzing body fluids includes a light transmitting and water impermeable support having provided thereon a fist non-fibrous porous layer, a second non-fibrous porous layer, and a fibrous porous layer in this order, the three porous layers being bonded together in one piece with an adhesive locally applied in such a manner that small through-holes are formed so as not to substantially interfere with uniform penetration of the liquid. At least one of the non-fibrous porous layers contains a reagent composition which undergoes a detectable optical change in the presence of a component to be analyzed, which optical change is detectable in the first non-fibrous porous layer, and wherein the non-fibrous porous layer comprises polysulfone. The analytical element enables dry analyses with improved precision independently of the hematocrit value of samples.

    摘要翻译： 用于分析体液的多层分析元件包括依次提供有第一非纤维多孔层，第二非纤维多孔层和纤维多孔层的透光性和不透水性的载体，所述三个多孔层 用局部施加的粘合剂一体地粘合在一起，使得形成小的通孔，从而基本不干扰液体的均匀渗透。 非纤维多孔层中的至少一个含有试剂组合物，其在待分析组分的存在下经历可检测的光学变化，该光学变化可在第一非纤维多孔层中检测到，并且其中非纤维状 多孔层包含聚砜。 分析元件能够独立于样品的血细胞比容值，提高精度的干性分析。

    Semiconductor integrated circuit
    3.
    发明申请
    Semiconductor integrated circuit 失效

    公开(公告)号：US20060214234A1

    公开(公告)日：2006-09-28

    申请号：US11384361

    申请日：2006-03-21

    申请人： Shigeru Nagatomo

    发明人： Shigeru Nagatomo

    IPC分类号： H01L23/62

    CPC分类号： H01L27/0921

    摘要： A semiconductor integrated circuit has complementary field-effect transistors, one formed in a semiconductor substrate, the other formed in a well in the substrate, and has four power-supply potentials: two supplied to the sources of the field-effect transistors, one supplied to the substrate, and one supplied to the well. An unwanted pair of parasitic bipolar transistors are formed in association with the field-effect transistors. An intentionally formed bipolar transistor operates in series with one of the unwanted parasitic transistors and as a current mirror for the other unwanted parasitic transistor, limiting the flow of unwanted current through the parasitic bipolar transistors.

    Protection circuit for semiconductor device
    4.
    发明授权
    Protection circuit for semiconductor device 失效
    半导体器件保护电路

    公开(公告)号：US5880514A

    公开(公告)日：1999-03-09

    申请号：US941069

    申请日：1997-09-30

    申请人： Shigeru Nagatomo

    发明人： Shigeru Nagatomo

    IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L29/861 ,  H01L29/00

    CPC分类号： H01L27/0248 ,  H01L27/0255

    摘要： A protection circuit for a semiconductor device, the protection circuit being connected an input terminal of the semiconductor device in parallel with an internal circuit proper of the semiconductor device, comprising a semiconductor substrate having one conductivity, a first diffusion layer having the other conductivity produced along the top surface of the semiconductor substrate, a second diffusion layer having the other conductivity produced along the top surface of the first diffusion layer, the impurity concentration of the second diffusion layer being larger than that of the first diffusion layer, at least one third diffusion layer having one conductivity produced along the top surface of the semiconductor substrate and the first diffusion layer across the junction of the first diffusion layer, the impurity concentration being larger than that of the semiconductor substrate, an insulator film produced to cover a portion of the second and third diffusion layers and the first diffusion layer, a pair of insulator films produced to cover a portion of the remaining area of the third diffusion layers, an electrode arranged to contact the second diffusion layer and to cover the insulator layer covering the first diffusion layer, and the electrode being connected the input terminal and the internal circuit proper of the semiconductor device, whereby the protection circuit allows positive surge voltages to escape, and becomes durable against negative surge voltages.

    摘要翻译： 一种用于半导体器件的保护电路，所述保护电路与所述半导体器件的内部电路本体并联连接所述半导体器件的输入端，所述半导体器件的内部电路包括具有一个导电性的半导体衬底，所述第一扩散层具有沿着 半导体衬底的顶表面，具有沿着第一扩散层的顶表面产生的另一导电性的第二扩散层，第二扩散层的杂质浓度大于第一扩散层的杂质浓度，至少一个第三扩散 具有沿着半导体衬底的顶表面产生的一个电导率的层和穿过第一扩散层的结的第一扩散层，杂质浓度大于半导体衬底的杂质浓度;产生的绝缘膜覆盖第二扩散层的一部分 和第三扩散层和第一扩散层 产生用于覆盖第三扩散层的剩余区域的一部分的一对绝缘膜，布置成接触第二扩散层并覆盖覆盖第一扩散层的绝缘体层的电极，并且电极与 输入端子和半导体器件的内部电路，由此保护电路允许正的浪涌电压逸出，并且耐负的浪涌电压耐用。

    Boosting circuit
    5.
    发明授权
    Boosting circuit 失效
    升压电路

    公开(公告)号：US07511561B2

    公开(公告)日：2009-03-31

    申请号：US11765519

    申请日：2007-06-20

    申请人： Shigeru Nagatomo ,  Kikuo Utsuno

    发明人： Shigeru Nagatomo ,  Kikuo Utsuno

    IPC分类号： G05F1/10 ,  G05F3/02

    CPC分类号： H02M3/07

    摘要： The present invention provides a charge-pump boosting circuit. In a charging period of a capacitor C1, a PMOS transistor Q1 and an NMOS transistor Q2 turn on, and the capacitor C1 is charged by voltage between a potential VCC and a potential VSS. On the other hand, in a discharging period of a boosting capacitor, a PMOS transistor Q3 and a PMOS transistor Q4 turn on, and charges accumulated in the boosting capacitor are discharged. In a discharging period of the capacitor C1, a selector SEL1 selects a terminal T1, and a feedback system, in which operation voltage applied to a gate of the PMOS transistor Q3 changes in accordance with fluctuations in output potential VDD2, is formed. At this time, only a resistance component of the PMOS transistor Q3 exists and no differential amplifier is provided, on a path of current flowing-into the capacitor C1 (between the potential VCC and a low voltage side terminal C1N of the boosting capacitor).

    摘要翻译： 本发明提供一种电荷泵升压电路。 在电容器C1的充电期间，PMOS晶体管Q1和NMOS晶体管Q2导通，电容器C1由电位VCC和电位VSS之间的电压充电。 另一方面，在升压电容器的放电期间，PMOS晶体管Q3和PMOS晶体管Q4导通，并且积蓄在升压电容器中的电荷被放电。 在电容器C1的放电期间，选择器SEL1选择端子T1，并且形成其中施加到PMOS晶体管Q3的栅极的工作电压根据输出电位VDD2的波动而变化的反馈系统。 此时，在流入电容器C1（电压VCC与升压电容器的低压侧端子C1N之间）的电流路径上，仅存在PMOS晶体管Q3的电阻成分，并且不设置差分放大器。

    Power-on reset circuit for generating a reset pulse signal upon detection of a power supply voltage
    6.
    发明授权
    Power-on reset circuit for generating a reset pulse signal upon detection of a power supply voltage 失效
    上电复位电路，用于在检测到电源电压时产生复位脉冲信号

    公开(公告)号：US06335646B1

    公开(公告)日：2002-01-01

    申请号：US09552315

    申请日：2000-04-19

    申请人： Shigeru Nagatomo

    发明人： Shigeru Nagatomo

    IPC分类号： H03K1722

    CPC分类号： H03K17/223

    摘要： A power-on reset circuit includes a capacitor, an inverter, a resistor and first and second transistors which are connected in series between a power supply line and ground. The electric current flowing through the resistor flow through the first and second transistors with a certain time delay because of an electric charge stored in the capacitor. A rising of a power supply voltage is applied to the inverter with a certain time delay when the power supply voltage goes up. According to the power-on reset circuit, a reset pulse can be generated regardless a speed of rising of the power supply voltage.

    摘要翻译： 上电复位电路包括在电源线和地之间串联连接的电容器，反相器，电阻器和第一和第二晶体管。 由于存储在电容器中的电荷，流经电阻器的电流以一定的时间延迟流过第一和第二晶体管。 当电源电压上升时，电源电压的上升以一定的时间延迟施加到逆变器。 根据上电复位电路，无论电源电压上升的速度如何，均可产生复位脉冲。

    Photographic material containing a novel polymer mordant
    9.
    发明授权
    Photographic material containing a novel polymer mordant 失效
    含有新型聚合物媒染剂的摄影材料

    公开(公告)号：US4312940A

    公开(公告)日：1982-01-26

    申请号：US166290

    申请日：1980-07-07

    申请人： Taku Nakamura ,  Shigeru Nagatomo

    发明人： Taku Nakamura ,  Shigeru Nagatomo

    IPC分类号： G03C8/56 ,  C08F8/00 ,  C08F8/44 ,  C08F12/00 ,  C08F20/00 ,  C08F20/34 ,  C08F20/52 ,  C08F26/00 ,  G03C1/005 ,  G03C1/835 ,  G03C1/84

    CPC分类号： G03C1/835 ,  Y10S430/142

    摘要： A photographic light-sensitive material comprising at least one layer containing a polymer dispersion of the following formula (I) or (II) as a mordant ##STR1## wherein A represents a monomer unit obtained from at least one monomer having at least two copolymerizable ethylenically unsaturated groups at least one of which is in the side chain; B represents a monomer unit obtained from at least one copolymerizable monoethylenically unsaturated monomer; D.sup..sym. represents a 5- or 6-membered heterocyclic group containing one or two nitrogen atoms one of which is positively charged and D may contain one or more substituents; R.sub.1 represents a hydrogen atom or a lower alkyl group; R.sub.2 and R.sub.3, which may be the same or different, each represents an alkyl group or an aralkyl group, or R.sub.2 and R.sub.3 may combine together with the nitrogen atom to which they are attached and form a 5- or 6-membered ring; X.sup..crclbar. represents an anion; Q represents an alkylene group, a phenylene group, an aralkylene group or a group of the formula ##STR2## wherein Y represents an alkylene group or an aralkylene group and R represents an alkyl group; and x, y and z represent the molar percentage of the respective units in the polymer and x is about 0.5 to 10%, y is about 0 to 60% and z is about 30 to 99.5%.

    摘要翻译： 包含至少一层包含下式（I）或（II）的聚合物分散体作为媒染剂的影像感光材料（I）其中A表示从 至少一种具有至少两个可共聚的烯属不饱和基团的单体，其中至少一种在侧链中; B表示由至少一种可共聚的单烯属不饱和单体获得的单体单元; D（+）表示含有一个或两个氮原子的5-或6-元杂环基团，其中一个带正电荷，D可含有一个或多个取代基; R1表示氢原子或低级烷基; R 2和R 3可以相同或不同，各自表示烷基或芳烷基，或者R 2和R 3可以与它们所连接的氮原子一起形成5-或6-元环; X（ - ）表示阴离子; Q表示亚烷基，亚苯基，亚芳烷基或下式的基团：其中Y表示亚烷基或亚芳烷基，R表示烷基; x，y和z表示聚合物中各单元的摩尔百分比，x为约0.5至10％，y为约0至60％，z为约30至99.5％。

    SEMICONDUCTOR INTEGRATED CIRCUIT
    10.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
    半导体集成电路

    公开(公告)号：US20120306549A1

    公开(公告)日：2012-12-06

    申请号：US13483529

    申请日：2012-05-30

    申请人： Shigeru Nagatomo

    发明人： Shigeru Nagatomo

    IPC分类号： H03L7/00

    CPC分类号： G05F3/242

    摘要： A semiconductor integrated circuit includes a constant current circuit and a start-up circuit. The constant current circuit includes a first current mirror circuit including a first and second transistors; and a second current mirror circuit including a third transistor connected to a first node and a fourth transistor connected to a second node. The start-up circuit includes a fifth transistor that supplies start-up current to the constant current circuit via the second node; a sixth transistor that uses a potential of the first node as a control voltage; a seventh transistor that is connected to a third node into which current from the sixth transistor flows and that has a diode-connected configuration; a capacitor connected to a fourth node into which current from the seventh transistor flows; and a latch circuit that controls the fifth based on a potential of the fourth node.

    摘要翻译： 半导体集成电路包括恒流电路和启动电路。 恒流电路包括包括第一和第二晶体管的第一电流镜电路; 以及包括连接到第一节点的第三晶体管和连接到第二节点的第四晶体管的第二电流镜电路。 启动电路包括第五晶体管，其经由第二节点向恒流电路提供启动电流; 使用第一节点的电位作为控制电压的第六晶体管; 连接到第三节点的第七晶体管，其中来自第六晶体管的电流流入其中，并具有二极管连接配置; 连接到来自第七晶体管的电流的第四节点的电容器; 以及基于第四节点的电位来控制第五的锁存电路。