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    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20120056202A1

    公开(公告)日：2012-03-08

    申请号：US13320247

    申请日：2010-04-27

    申请人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

    发明人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

    IPC分类号： H01L29/24

    CPC分类号： H01L29/7802 ,  C30B23/00 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395

    摘要： A MOSFET, which is a semiconductor device allowing for reduced on-resistance while restraining stacking faults from being produced due to heat treatment in a device manufacturing process, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source contact electrode disposed on the active layer; and a drain electrode formed on the other main surface of the silicon carbide substrate. The silicon carbide substrate includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. Further, the base layer has an impurity concentration greater than 2×1019 cm−3, and the SiC layer has an impurity concentration greater than 5×1018 cm−3 and smaller than 2×1019 cm−3.

    摘要翻译： 一种MOSFET，其是在器件制造工艺中由于热处理而允许抑制堆垛层错而产生降低的导通电阻的半导体器件，包括：碳化硅衬底; 由单晶碳化硅构成的有源层，设置在碳化硅基板的一个主面上; 设置在有源层上的源极接触电极; 以及形成在碳化硅衬底的另一个主表面上的漏电极。 碳化硅基板包括：由碳化硅制成的基层; 以及由单晶碳化硅制成并设置在基底层上的SiC层。 此外，基底层的杂质浓度大于2×1019cm-3，并且SiC层的杂质浓度大于5×1018cm-3且小于2×1019cm-3。

    Silicon carbide substrate and method of manufacturing the same
    6.
    发明授权
    Silicon carbide substrate and method of manufacturing the same 有权
    碳化硅基板及其制造方法

    公开(公告)号：US09255344B2

    公开(公告)日：2016-02-09

    申请号：US13605265

    申请日：2012-09-06

    申请人： Shin Harada ,  Shinsuke Fujiwara ,  Taro Nishiguchi

    发明人： Shin Harada ,  Shinsuke Fujiwara ,  Taro Nishiguchi

    IPC分类号： C30B23/00 ,  C30B29/36 ,  C30B35/00 ,  H01L21/02

    CPC分类号： C30B23/025 ,  C30B23/005 ,  C30B29/36 ,  C30B35/007 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02631

    摘要： A silicon carbide substrate capable of stably forming a device of excellent performance, and a method of manufacturing the same are provided. A silicon carbide substrate is made of a single crystal of silicon carbide, and has a width of not less than 100 mm, a micropipe density of not more than 7 cm−2, a threading screw dislocation density of not more than 1×104 cm−2, a threading edge dislocation density of not more than 1×104 cm−2, a basal plane dislocation density of not more than 1×104 cm−2, a stacking fault density of not more than 0.1 cm−1, a conductive impurity concentration of not less than 1×1018 cm−3, a residual impurity concentration of not more than 1×1016 cm−3, and a secondary phase inclusion density of not more than 1 cm−3.

    摘要翻译： 提供能够稳定地形成优异性能的器件的碳化硅衬底及其制造方法。 碳化硅衬底由碳化硅单晶制成，宽度不小于100mm，微管密度不超过7cm -2，螺纹位错密度不大于1×104cm -2，螺纹刃位错密度不大于1×104cm-2，基面位错密度不大于1×104cm-2，堆垛层错密度不大于0.1cm-1，导电 杂质浓度不小于1×1018 cm -3，残留杂质浓度不大于1×1016 cm-3，次相夹杂密度不大于1 cm -3。

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20120056203A1

    公开(公告)日：2012-03-08

    申请号：US13320250

    申请日：2010-04-27

    申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Taro Nishiguchi ,  Makoto Sasaki ,  Yasuo Namikawa ,  Shinsuke Fujiwara

    发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Taro Nishiguchi ,  Makoto Sasaki ,  Yasuo Namikawa ,  Shinsuke Fujiwara

    IPC分类号： H01L29/12

    CPC分类号： H01L29/1608 ,  H01L29/32 ,  H01L29/66068 ,  H01L29/808

    摘要： A JFET, which is a semiconductor device allowing for reduced manufacturing cost, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source electrode disposed on the active layer; and a drain electrode formed on the active layer and separated from the source electrode. The silicon carbide substrate includes: a base layer made of single-crystal silicon carbide, and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The SiC layer has a defect density smaller than that of the base layer.

    摘要翻译： 作为允许降低制造成本的半导体器件的JFET包括：碳化硅衬底; 由单晶碳化硅构成的有源层，设置在碳化硅基板的一个主面上; 设置在所述有源层上的源电极; 以及形成在有源层上并与源电极分离的漏电极。 碳化硅基板包括：由单晶碳化硅制成的基底层和由单晶碳化硅制成并设置在基底层上的SiC层。 SiC层的缺陷密度小于基底层的缺陷密度。