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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20130153900A1

    公开(公告)日：2013-06-20

    申请号：US13818993

    申请日：2011-08-26

    申请人： Shinichi Kinouchi ,  Hiroshi Nakatake ,  Yuji Ebiike ,  Akihiko Furukawa ,  Masayuki Imaizumi

    发明人： Shinichi Kinouchi ,  Hiroshi Nakatake ,  Yuji Ebiike ,  Akihiko Furukawa ,  Masayuki Imaizumi

    IPC分类号： H01L23/34

    CPC分类号： H01L23/34 ,  G01K7/01 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7803 ,  H01L29/7815 ,  H01L29/7828 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device capable of rapidly and accurately sensing the information regarding the temperature of a semiconductor transistor contained therein. A MOSFET includes a plurality of cells, and includes a main cell group including a cell for supplying a current to a load among the plurality of cells, and a sense cell group including a cell for sensing temperature information regarding the temperature of the MOSFET thereamong. The main cell group and the sense cell group have different temperature characteristics showing changes in electrical characteristics to changes in temperature. A temperature sensing circuit senses the temperature of the MOSFET based on, for example, a value of a main current flowing through the main cell group and a value of a sense current flowing through the sense cell group.

    摘要翻译： 一种半导体器件，其能够快速且准确地感测关于其中包含的半导体晶体管的温度的信息。 MOSFET包括多个单元，并且包括主单元组，其包括用于向多个单元之间的负载提供电流的单元，以及包括用于感测关于MOSFET的温度的温度信息的单元的感测单元组。 主电池组和感应电池组具有不同的温度特性，显示电特性随温度变化的变化。 温度检测电路基于例如流过主单元组的主电流的值和流过感测单元组的感测电流的值来感测MOSFET的温度。

    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08785931B2

    公开(公告)日：2014-07-22

    申请号：US13818993

    申请日：2011-08-26

    申请人： Shinichi Kinouchi ,  Hiroshi Nakatake ,  Yuji Ebiike ,  Akihiko Furukawa ,  Masayuki Imaizumi

    发明人： Shinichi Kinouchi ,  Hiroshi Nakatake ,  Yuji Ebiike ,  Akihiko Furukawa ,  Masayuki Imaizumi

    IPC分类号： H01L23/58 ,  H01L29/78

    CPC分类号： H01L23/34 ,  G01K7/01 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7803 ,  H01L29/7815 ,  H01L29/7828 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device capable of rapidly and accurately sensing the information regarding the temperature of a semiconductor transistor contained therein. A MOSFET includes a plurality of cells, and includes a main cell group including a cell for supplying a current to a load among the plurality of cells, and a sense cell group including a cell for sensing temperature information regarding the temperature of the MOSFET thereamong. The main cell group and the sense cell group have different temperature characteristics showing changes in electrical characteristics to changes in temperature. A temperature sensing circuit senses the temperature of the MOSFET based on, for example, a value of a main current flowing through the main cell group and a value of a sense current flowing through the sense cell group.

    摘要翻译： 一种半导体器件，其能够快速且准确地感测关于其中包含的半导体晶体管的温度的信息。 MOSFET包括多个单元，并且包括主单元组，其包括用于向多个单元之间的负载提供电流的单元，以及包括用于感测关于MOSFET的温度的温度信息的单元的感测单元组。 主电池组和感应电池组具有不同的温度特性，显示电特性随温度变化的变化。 温度检测电路基于例如流过主单元组的主电流的值和流过感测单元组的感测电流的值来感测MOSFET的温度。

    Drive circuit for semiconductor element
    3.
    发明授权
    Drive circuit for semiconductor element 有权
    半导体元件驱动电路

    公开(公告)号：US07948277B2

    公开(公告)日：2011-05-24

    申请号：US12294437

    申请日：2007-04-04

    申请人： Hiroshi Nakatake ,  Satoshi Ishibashi ,  Shinsuke Idenoue ,  Takeshi Oi ,  Shinichi Kinouchi ,  Takeshi Horiguchi

    发明人： Hiroshi Nakatake ,  Satoshi Ishibashi ,  Shinsuke Idenoue ,  Takeshi Oi ,  Shinichi Kinouchi ,  Takeshi Horiguchi

    IPC分类号： H03K3/00

    CPC分类号： H03K17/18 ,  H03K17/08128 ,  H03K17/168

    摘要： A drive circuit wherein any abnormality of a semiconductor element is prevented from being erroneously sensed in a case where a gate “ON” command has entered in a state in which a gate voltage of the semiconductor element has not lowered fully. A detection process for a controlled variable of the semiconductor element is permitted only within a period which corresponds to a controlled variable of the semiconductor element at the time when an “ON” signal has been inputted to a control circuit, and a detected controlled variable which is detected within the period and a comparison controlled variable which is set in correspondence with the controlled variable are compared so as to output an abnormality signal, whereby the semiconductor element is turn-off at a speed lower than in normal turn-off.

    摘要翻译： 在半导体元件的栅极电压未完全降低的状态下，在栅极“ON”指令进入的情况下，防止半导体元件的任何异常被错误地检测到的驱动电路。 只有在“ON”信号被输入到控制电路时的半导体元件的受控变量对应的期间内才允许半导体元件的受控变量的检测处理，以及检测到的控制变量， 在与该控制变量对应的情况下设定的比较控制变量进行比较，从而输出异常信号，由此半导体元件以比正常关断低的速度关断。

    DRIVE CIRCUIT FOR SEMICONDUCTOR ELEMENT
    4.
    发明申请
    DRIVE CIRCUIT FOR SEMICONDUCTOR ELEMENT 有权
    半导体元件的驱动电路

    公开(公告)号：US20100231269A1

    公开(公告)日：2010-09-16

    申请号：US12294437

    申请日：2007-04-04

    申请人： Hiroshi Nakatake ,  Satoshi Ishibashi ,  Shinsuke Idenoue ,  Takeshi Oi ,  Shinichi Kinouchi ,  Takeshi Horiguchi

    发明人： Hiroshi Nakatake ,  Satoshi Ishibashi ,  Shinsuke Idenoue ,  Takeshi Oi ,  Shinichi Kinouchi ,  Takeshi Horiguchi

    IPC分类号： H03K3/021

    CPC分类号： H03K17/18 ,  H03K17/08128 ,  H03K17/168

    摘要： A drive circuit wherein any abnormality of a semiconductor element is prevented from being erroneously sensed in a case where a gate “ON” command has entered in a state in which a gate voltage of the semiconductor element has not lowered fully. A detection process for a controlled variable of the semiconductor element is permitted only within a period which corresponds to a controlled variable of the semiconductor element at the time when an “ON” signal has been inputted to a control circuit, and a detected controlled variable which is detected within the period and a comparison controlled variable which is set in correspondence with the controlled variable are compared so as to output an abnormality signal, whereby the semiconductor element is turn-off at a speed lower than in normal turn-off.

    摘要翻译： 在半导体元件的栅极电压未完全降低的状态下，在栅极“ON”指令进入的情况下，防止半导体元件的任何异常被错误地检测到的驱动电路。 只有在“ON”信号被输入到控制电路时的半导体元件的受控变量对应的期间内才允许半导体元件的受控变量的检测处理，以及检测到的控制变量， 在与该控制变量对应的情况下设定的比较控制变量进行比较，从而输出异常信号，由此半导体元件以比正常关断低的速度关断。

    Gate driving circuit
    5.
    发明授权
    Gate driving circuit 有权
    门驱动电路

    公开(公告)号：US08598920B2

    公开(公告)日：2013-12-03

    申请号：US13260069

    申请日：2010-05-07

    申请人： Hiroshi Nakatake ,  Shinichi Kinouchi ,  Tatsuya Kitamura

    发明人： Hiroshi Nakatake ,  Shinichi Kinouchi ,  Tatsuya Kitamura

    IPC分类号： H03K3/00

    CPC分类号： H03K17/168 ,  H02M1/08 ,  H03K17/163

    摘要： A gate driving circuit for driving a voltage-driven switching device is provided with a current limiting circuit for limiting a gate current ig that flows into a gate terminal through a gate resistor at turn-on to a current limit value IL which defines an upper limit value. The current limit value IL is set at a value which is larger than a gate current value I2 at turn-on of the switching device during a period when the Miller effect occurs but is smaller than a gate current value I1 at a point in time when a main current begins to flow at turn-on in a case where the gate current ig is not limited by the current limiting circuit. This arrangement makes a variation in a collector current of the switching device moderate at turn-on thereof when the collector current begins to flow, thereby reducing high-frequency noise.

    摘要翻译： 用于驱动电压驱动开关器件的栅极驱动电路设置有限流电路，用于限制通过导通时的栅极电阻流入栅极端子的栅极电流ig，限定限定上限的电流限制值IL 值。 电流限制值IL被设定为大于开关器件接通时的栅极电流值I2的值，该值在发生米勒效应的时段期间小于在时间点的栅极电流值I1 在栅极电流ig不受限流电路限制的情况下，主电流在导通时开始流动。 这种布置使得当集电极电流开始流动时，开关装置的集电极电流的变化在其接通时中等，从而降低高频噪声。

    GATE DRIVING CIRCUIT
    6.
    发明申请
    GATE DRIVING CIRCUIT 有权
    门驱动电路

    公开(公告)号：US20120013371A1

    公开(公告)日：2012-01-19

    申请号：US13260069

    申请日：2010-05-07

    申请人： Hiroshi Nakatake ,  Shinichi Kinouchi ,  Tatsuya Kitamura

    发明人： Hiroshi Nakatake ,  Shinichi Kinouchi ,  Tatsuya Kitamura

    IPC分类号： H03K3/00

    CPC分类号： H03K17/168 ,  H02M1/08 ,  H03K17/163

    摘要： A gate driving circuit for driving a voltage-driven switching device is provided with a current limiting circuit for limiting a gate current ig that flows into a gate terminal through a gate resistor at turn-on to a current limit value IL which defines an upper limit value. The current limit value IL is set at a value which is larger than a gate current value I2 at turn-on of the switching device during a period when the Miller effect occurs but is smaller than a gate current value I1 at a point in time when a main current begins to flow at turn-on in a case where the gate current ig is not limited by the current limiting circuit. This arrangement makes a variation in a collector current of the switching device moderate at turn-on thereof when the collector current begins to flow, thereby reducing high-frequency noise.

    摘要翻译： 用于驱动电压驱动开关器件的栅极驱动电路设置有限流电路，用于限制通过导通时的栅极电阻流入栅极端子的栅极电流ig，限定限定上限的电流限制值IL 值。 电流限制值IL被设定为大于开关器件接通时的栅极电流值I2的值，该值在发生米勒效应的时段期间小于在时间点的栅极电流值I1 在栅极电流ig不受限流电路限制的情况下，主电流在导通时开始流动。 这种布置使得当集电极电流开始流动时，开关装置的集电极电流的变化在其接通时中等，从而降低高频噪声。

    Power semiconductor module, power converting apparatus, and railway car
    7.
    发明授权
    Power semiconductor module, power converting apparatus, and railway car 有权
    功率半导体模块，电力转换装置和铁路车辆

    公开(公告)号：US09270193B2

    公开(公告)日：2016-02-23

    申请号：US13582834

    申请日：2010-10-29

    申请人： Takeshi Tanaka ,  Shinichi Kinouchi

    发明人： Takeshi Tanaka ,  Shinichi Kinouchi

    IPC分类号： H02P6/14 ,  H01L29/267 ,  H02M5/45 ,  H02M5/458 ,  B60L9/22 ,  H03K17/12

    CPC分类号： H02M5/4585 ,  B60L9/22 ,  B60L2200/26 ,  H03K17/127

    摘要： A power semiconductor module includes an element pair formed by connecting, in anti-parallel to each other, an IGBT and an FWD group in which an FWD, a voltage drop characteristic of which during conduction has a negative temperature coefficient, and an FED, a voltage drop characteristic of which during conduction has a positive temperature coefficient, are connected in series and an element pair formed by connecting, in anti-parallel to each other, an IGBT and an FWD group in which a FWD, a voltage drop characteristic of which during conduction has a negative temperature coefficient, and an FWD, a voltage drop characteristic of which during conduction has a positive temperature coefficient, are connected in series. The element pairs are connected in parallel.

    摘要翻译： 功率半导体模块包括通过以彼此反并联的方式连接IGBT和FWD组形成的元件对，其中FWD（其导通期间的电压降特性具有负温度系数）以及FED， 在导通期间具有正温度系数的电压降特性串联连接，并且通过将IGBT和FWD组反向并联连接形成的元件对，其中FWD，其电压降特性 在导通时具有负温度系数，并且在导通期间具有正温度系数的电压降特性的FWD串联连接。 元件对并联连接。