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    SUBSTRATE PROCESSING METHOD
    1.
    发明申请
    SUBSTRATE PROCESSING METHOD 审中-公开
    基板处理方法

    公开(公告)号：US20120247677A1

    公开(公告)日：2012-10-04

    申请号：US13434989

    申请日：2012-03-30

    申请人： Shinji Himori ,  Norikazu Yamada ,  Ohse Takeshi

    发明人： Shinji Himori ,  Norikazu Yamada ,  Ohse Takeshi

    IPC分类号： H01L21/306 ,  H01L21/3065

    CPC分类号： H01J37/32697 ,  H01J37/32091 ,  H01J37/32165 ,  H01J37/32366 ,  H01J37/32642 ,  H01J37/32706 ,  H01J37/32724 ,  H01J2237/327

    摘要： A substrate processing apparatus capable of improving a processing controllability in an etching process is provided. The substrate processing apparatus (10) includes a depressurized processing room (11); a susceptor (12) that is provided in the processing room (11) and configured to mount a wafer (W) thereon; a HF high frequency power supply (18) configured to apply a high frequency voltage for plasma generation to the susceptor (12); a LF high frequency power supply (20) configured to apply a high frequency voltage for a bias voltage generation to the susceptor (12); and a DC voltage applying unit (23) configured to apply a DC voltage of a rectangle-shaped wave to the susceptor (12).

    摘要翻译： 提供了能够提高蚀刻处理中的处理可控性的基板处理装置。 基板处理装置（10）具有减压处理室（11）。 设置在处理室（11）中并构造成在其上安装晶片（W）的感受体（12）; HF高频电源（18），被配置为向所述基座（12）施加用于等离子体产生的高频电压; LF高频电源（20），被配置为向所述基座（12）施加偏置电压产生的高频电压; 以及直流电压施加单元（23），被配置为向所述基座（12）施加矩形波的直流电压。

    Substrate processing apparatus and substrate processing method using same
    2.
    发明授权
    Substrate processing apparatus and substrate processing method using same 有权
    基板处理装置及基板处理方法

    公开(公告)号：US08568606B2

    公开(公告)日：2013-10-29

    申请号：US12750015

    申请日：2010-03-30

    申请人： Takeshi Ohse ,  Shinji Himori ,  Jun Abe ,  Norikazu Yamada

    发明人： Takeshi Ohse ,  Shinji Himori ,  Jun Abe ,  Norikazu Yamada

    IPC分类号： C03C15/00

    CPC分类号： H01J37/02 ,  H01J37/32091 ,  H01J37/32146 ,  H01J37/32165

    摘要： A substrate processing method uses a substrate processing apparatus including a chamber for accommodating a substrate, a lower electrode to mount the substrate, a first RF power applying unit for applying an RF power for plasma generation into the chamber, and a second RF power applying unit for applying an RF power for bias to the lower electrode. The RF power for plasma generation is controlled to be intermittently changed by changing an output of the first RF power applying unit at a predetermined timing. If no plasma state or an afterglow state exists in the chamber by a control of the first RF power applying unit, an output of the second RF power applying unit is controlled to be in an OFF state or decreased below an output of the second RF power applying unit when the output of the first RF power applying unit is a set output.

    摘要翻译： 基板处理方法使用基板处理装置，其包括用于容纳基板的室，用于安装基板的下电极，用于将用于等离子体产生的RF功率施加到室中的第一RF功率施加单元和第二RF功率施加单元 用于向下电极施加用于偏压的RF功率。 通过在预定的定时改变第一RF功率施加单元的输出来控制等离子体产生的RF功率间歇地改变。 如果通过第一RF功率施加单元的控制在腔室中不存在等离子体状态或余辉状态，则第二RF功率施加单元的输出被控制为处于OFF状态或降低到低于第二RF功率的输出 当第一RF功率施加单元的输出为设定输出时，施加单元。

    SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD USING SAME
    3.
    发明申请
    SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD USING SAME 有权
    基板处理装置和基板处理方法

    公开(公告)号：US20100243607A1

    公开(公告)日：2010-09-30

    申请号：US12750015

    申请日：2010-03-30

    申请人： Takeshi Ohse ,  Shinji Himori ,  Jun Abe ,  Norikazu Yamada

    发明人： Takeshi Ohse ,  Shinji Himori ,  Jun Abe ,  Norikazu Yamada

    IPC分类号： C23F1/08 ,  C23F1/00

    CPC分类号： H01J37/02 ,  H01J37/32091 ,  H01J37/32146 ,  H01J37/32165

    摘要： A substrate processing method uses a substrate processing apparatus including a chamber for accommodating a substrate, a lower electrode to mount the substrate, a first RF power applying unit for applying an RF power for plasma generation into the chamber, and a second RF power applying unit for applying an RF power for bias to the lower electrode. The RF power for plasma generation is controlled to be intermittently changed by changing an output of the first RF power applying unit at a predetermined timing. If no plasma state or an afterglow state exists in the chamber by a control of the first RF power applying unit, an output of the second RF power applying unit is controlled to be in an OFF state or decreased below an output of the second RF power applying unit when the output of the first RF power applying unit is a set output.

    摘要翻译： 基板处理方法使用基板处理装置，其包括用于容纳基板的室，用于安装基板的下电极，用于将用于等离子体产生的RF功率施加到室中的第一RF功率施加单元和第二RF功率施加单元 用于向下电极施加用于偏压的RF功率。 通过在预定的定时改变第一RF功率施加单元的输出来控制等离子体产生的RF功率间歇地改变。 如果通过第一RF功率施加单元的控制在腔室中不存在等离子体状态或余辉状态，则第二RF功率施加单元的输出被控制为处于OFF状态或降低到低于第二RF功率的输出 当第一RF功率施加单元的输出为设定输出时，施加单元。

    DRY-ETCHING METHOD
    7.
    发明申请
    DRY-ETCHING METHOD 有权
    干蚀法

    公开(公告)号：US20090098736A1

    公开(公告)日：2009-04-16

    申请号：US12335872

    申请日：2008-12-16

    申请人： Etsuo Iijima ,  Norikazu Yamada

    发明人： Etsuo Iijima ,  Norikazu Yamada

    IPC分类号： H01L21/3065

    CPC分类号： H01J37/32935 ,  H01L21/32137

    摘要： A main etching step is effected in a state shown in FIG. 1A under a first pressure using a gas containing at least HBr, e.g., a mixture gas of HBr and Cl2 as an etching gas. The main etching is ended before a silicon oxide film 102, as shown in FIG. 1B, is exposed. An over-etching process is effected under a second pressure higher than the first pressure using a gas containing at least HBr, e.g., an HBr single gas so as to completely expose the silicon oxide film 102 as shown in FIG. 1C. In such a way, the selectivity of a silicon-containing conductive layer with respect to the silicon oxide film is improved compared to conventional methods. Without etching the silicon oxide film layer, which is an underlying layer, and without marring the shape of the silicon-containing conductive film layer formed by etching, only the desired silicon-containing conductive film layer is removed by etching reliably.

    摘要翻译： 主蚀刻步骤在图3所示的状态下进行。 在第一压力下使用至少包含HBr的气体，例如作为蚀刻气体的HBr和Cl2的混合气体。 主蚀刻在氧化硅膜102之前结束，如图1所示。 1B ，被暴露。 使用高于第一压力的第二压力，使用至少包含HBr的气体，例如HBr单一气体进行过蚀刻工艺，以便完全暴露氧化硅膜102，如图中所示。 >图。 1C 。 以这种方式，与常规方法相比，含硅导电层相对于氧化硅膜的选择性得到改善。 在不蚀刻作为下层的氧化硅膜层的情况下，不侵蚀通过蚀刻形成的含硅导电膜层的形状，仅通过可靠地蚀刻除去所需的含硅导电膜层。

    DRY-ETCHING METHOD
    10.
    发明申请
    DRY-ETCHING METHOD 审中-公开
    干蚀法

    公开(公告)号：US20130025789A1

    公开(公告)日：2013-01-31

    申请号：US13620893

    申请日：2012-09-15

    申请人： Etsuo IIJIMA ,  Norikazu Yamada

    发明人： Etsuo IIJIMA ,  Norikazu Yamada

    IPC分类号： H01L21/3065

    CPC分类号： H01J37/32935 ,  H01L21/32137

    摘要： A process including a main etching step under a first pressure using a gas containing at least HBr as an etching gas. The main etching is ended before a silicon oxide film is exposed. An over-etching process is effected under a second pressure higher than the first pressure using a gas containing at least HBr so as to completely expose the silicon oxide film. In such a way, the selectivity of a silicon-containing conductive layer with respect to the silicon oxide film is improved. Without etching the silicon oxide film layer, which is an underlying layer, and without marring the shape of the silicon-containing conductive film layer formed by etching, only the desired silicon-containing conductive film layer is removed by etching reliably.

    摘要翻译： 一种包括使用至少包含HBr作为蚀刻气体的气体的第一压力下的主蚀刻步骤的方法。 在氧化硅膜暴露之前结束主蚀刻。 在比第一压力高的第二压力下使用至少包含HBr的气体进行过蚀刻处理，以完全暴露氧化硅膜。 以这种方式，提高了含硅导电层相对于氧化硅膜的选择性。 在不蚀刻作为下层的氧化硅膜层的情况下，不侵蚀通过蚀刻形成的含硅导电膜层的形状，仅通过可靠地蚀刻除去所需的含硅导电膜层。