利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

15 条记录 (耗时 0.028 秒)

    VERTICAL MEMORY DEVICES
    1.
    发明申请
    VERTICAL MEMORY DEVICES 审中-公开

    公开(公告)号：US20180247950A1

    公开(公告)日：2018-08-30

    申请号：US15801551

    申请日：2017-11-02

    申请人： Su-Ok YUN ,  Jang-Gn YUN ,  Joon-Sung LIM ,  Sung-Min HWANG

    发明人： Su-Ok YUN ,  Jang-Gn YUN ,  Joon-Sung LIM ,  Sung-Min HWANG

    IPC分类号： H01L27/11556 ,  H01L27/11582

    CPC分类号： H01L27/11556 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

    摘要： A vertical memory device includes a gate structure on a peripheral circuit region of a substrate, the substrate including a cell region and the peripheral circuit region, and the gate structure including a first gate electrode, second, third, and fourth gate electrodes sequentially disposed at a plurality of levels, respectively, on the cell region of the substrate in a vertical direction substantially perpendicular to an upper surface of the substrate, a first epitaxial layer extending through the second gate electrode on the cell region of the substrate, a channel extending through the third and fourth gate electrodes in the vertical direction on the first epitaxial layer, and a second epitaxial layer on a portion of the peripheral circuit region of the substrate adjacent the gate structure.

    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20130020647A1

    公开(公告)日：2013-01-24

    申请号：US13540799

    申请日：2012-07-03

    申请人： Sung-Min HWANG ,  In-Wook Oh ,  Woonkyung Lee ,  Aaron Park ,  Hoosung Cho

    发明人： Sung-Min HWANG ,  In-Wook Oh ,  Woonkyung Lee ,  Aaron Park ,  Hoosung Cho

    IPC分类号： H01L29/78 ,  H01L23/498

    CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11575

    摘要： Semiconductor devices are provided. The semiconductor device includes conductive patterns vertically stacked on a substrate to be spaced apart from each other, and pad patterns electrically connected to respective ones of the conductive patterns. Each of the pad patterns includes a flat portion extending from an end of the conductive pattern in a first direction parallel with the substrate and a landing sidewall portion upwardly extending from an end of the flat portion. A width of a portion of the landing sidewall portion in a second direction parallel with the substrate and perpendicular to the first direction is less than a width of the flat portion in the second direction. The related methods are also provided.

    摘要翻译： 提供半导体器件。 半导体器件包括垂直堆叠在基板上以彼此间隔开的导电图案，以及电连接到相应导电图案的焊盘图案。 每个焊盘图案包括从平行于基板的第一方向从导电图案的端部延伸的平坦部分和从平坦部分的端部向上延伸的着陆侧壁部分。 着陆侧壁部的与基板平行且垂直于第一方向的第二方向的一部分的宽度小于第二方向上的平坦部的宽度。 还提供了相关方法。

    VERTICAL TYPE SEMICONDUCTOR DEVICES
    5.
    发明申请
    VERTICAL TYPE SEMICONDUCTOR DEVICES 有权
    垂直型半导体器件

    公开(公告)号：US20140197481A1

    公开(公告)日：2014-07-17

    申请号：US14156607

    申请日：2014-01-16

    申请人： Sung-Min HWANG ,  Han-Soo KIM ,  Woon-Kyung LEE ,  Won-Seok CHO

    发明人： Sung-Min HWANG ,  Han-Soo KIM ,  Woon-Kyung LEE ,  Won-Seok CHO

    IPC分类号： H01L29/78

    CPC分类号： H01L29/66833 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/7926

    摘要： A vertical type semiconductor device includes first and second word line structures that include first and second word lines. The word lines surround a plurality of pillar structures, which are provided to connect the word lines to corresponding string select lines. Connecting patterns electrically connect pairs of adjacent first and second word lines in a same plane. The device may be a nonvolatile memory device or a different type of device.

    摘要翻译： 垂直型半导体器件包括包括第一和第二字线的第一和第二字线结构。 字线围绕多个柱结构，其被提供以将字线连接到相应的字符串选择线。 连接图案将相邻的第一和第二字线的对电连接在同一平面中。 该设备可以是非易失性存储设备或不同类型的设备。

    THREE-DIMENSIONAL SEMICONDUCTOR DEVICE
    6.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20170338242A1

    公开(公告)日：2017-11-23

    申请号：US15437426

    申请日：2017-02-20

    申请人： Sung-Min HWANG

    发明人： Sung-Min HWANG

    IPC分类号： H01L27/11582 ,  H01L23/522 ,  H01L23/528 ,  H01L23/535

    CPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L27/11575

    摘要： A three-dimensional semiconductor device may include a lower electrode structure having a plurality of lower electrodes vertically stacked on a substrate and an upper electrode structure having a plurality of upper electrodes stacked on the lower electrode structure. Each of the lower and upper electrodes may include an electrode portion that is parallel to a top surface of the substrate and a vertical pad portion that is inclined with respect to the top surface of the substrate. The vertical pad portions of adjacent lower electrodes may be spaced apart from each other by a first horizontal distance. The vertical pad portions of adjacent lower and upper electrodes may be spaced apart from each other by a second horizontal distance that is greater than the first horizontal distance.

    METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE
    7.
    发明申请
    METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20140199815A1

    公开(公告)日：2014-07-17

    申请号：US14156781

    申请日：2014-01-16

    申请人： Sung-Min HWANG ,  Han-Soo KIM ,  Woon-Kyung LEE ,  Won-Seok CHO

    发明人： Sung-Min HWANG ,  Han-Soo KIM ,  Woon-Kyung LEE ,  Won-Seok CHO

    IPC分类号： H01L29/66

    CPC分类号： H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

    摘要： A method of manufacturing a vertical type memory device includes stacking a first lower insulating layer, one layer of a lower sacrificial layer and a second lower insulating layer on a substrate, forming a stacking structure by stacking sacrificial layers and insulating layers, and etching an edge portion of the stacking structure to form a preliminary stepped shape pattern structure. The preliminary stepped shape pattern structure has a stepped shape edge portion. A pillar structure making contact with a surface of the substrate is formed. The preliminary stepped shape pattern structure, the lower sacrificial layer, and the first and second lower insulating layers are partially etched to form a first opening portion and a second opening portion to form a stepped shape pattern structure. The second opening portion cuts at least an edge portion of the lower sacrificial layer.

    摘要翻译： 制造垂直型存储装置的方法包括在基板上堆叠第一下绝缘层，一层下牺牲层和第二下绝缘层，通过堆叠牺牲层和绝缘层形成堆叠结构，并蚀刻边缘 部分堆叠结构以形成初步阶形状图案结构。 初步阶形形状图案结构具有阶梯形边缘部分。 形成与基板表面接触的柱结构。 部分地蚀刻初步阶形状图案结构，下牺牲层和第一下绝缘层和第二下绝缘层，以形成第一开口部分和第二开口部分，以形成台阶状图形结构。 第二开口部分切割下牺牲层的至少边缘部分。

    SMALL BATTERY PACK EMPLOYING PCM ON SIDE SEALING PART
    9.
    发明申请
    SMALL BATTERY PACK EMPLOYING PCM ON SIDE SEALING PART 审中-公开
    小型电池组件在侧面密封部分使用PCM

    公开(公告)号：US20070264535A1

    公开(公告)日：2007-11-15

    申请号：US11563988

    申请日：2006-11-28

    申请人： Hyang LEE ,  Jung-hwan KIM ,  Heegyoung KANG ,  Kichul HONG ,  Sung-Min HWANG ,  Tae KIM ,  Ju-Hwan BAEK ,  Jung WOO ,  Kyong KANG ,  Soo PARK ,  Sanggon KIM

    发明人： Hyang LEE ,  Jung-hwan KIM ,  Heegyoung KANG ,  Kichul HONG ,  Sung-Min HWANG ,  Tae KIM ,  Ju-Hwan BAEK ,  Jung WOO ,  Kyong KANG ,  Soo PARK ,  Sanggon KIM

    IPC分类号： H01M14/00

    CPC分类号： H01M2/0207 ,  H01M2/0287 ,  H01M2/0292 ,  H01M2/347 ,  H01M10/425

    摘要： Disclosed herein is a battery pack constructed such that a battery case, in which an electrode assembly is mounted, is made of a laminate sheet having high strength, side sealing parts of the battery case are formed in a specific shape, and a protection circuit module (PCM) is located in the inner space of at least one of the side sealing parts. The side sealing parts in themselves are used as a structure to decide the external shape of the battery pack, and, at the same time, are used as spaces for mounting the PCM therein. Consequently, it is possible to construct the battery pack without using additional pack sheathing members, to simplify the assembly process of the battery pack, and to manufacture the battery pack in a thinner and more compact structure with the reduced manufacturing costs. Furthermore, the PCM is located at either side of the battery cell while the PCM is spaced apart from electrode terminals. Consequently, the battery pack exhibits high safety against external impacts, such as dropping of the battery pack.

    摘要翻译： 这里公开了一种电池组件，其构造成使得其中安装有电极组件的电池壳体由具有高强度的层压片制成，电池壳体的侧密封部分形成为特定形状，并且保护电路模块 （PCM）位于至少一个侧面密封部分的内部空间中。 侧密封部件本身用作决定电池组的外形的结构，并且同时用作在其中安装PCM的空间。 因此，可以在不使用附加的包装件的情况下构建电池组，以简化电池组的组装过程，并且以更低的制造成本制造更薄更紧凑的结构的电池组。 此外，PCM位于电池单元的两侧，而PCM与电极端子间隔开。 因此，电池组对于外部冲击（例如电池组的掉落）表现出高的安全性。