公开(公告)号：US20170330632A1

公开(公告)日：2017-11-16

申请号：US15664303

申请日：2017-07-31

申请人： Sun-Il SHIM ,  Jae-Hoon JANG ,  Donghyuk CHAE ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

发明人： Sun-Il SHIM ,  Jae-Hoon JANG ,  Donghyuk CHAE ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

IPC分类号： G11C16/34 ,  G11C16/14 ,  G11C16/04 ,  G11C16/12 ,  G11C16/10 ,  G11C16/08 ,  H01L27/11582 ,  G11C16/26 ,  H01L27/1157

CPC分类号： G11C16/3459 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/12 ,  G11C16/14 ,  G11C16/26 ,  G11C16/3418 ,  H01L27/1157 ,  H01L27/11582

摘要： Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.

公开(公告)号：US20160284419A1

公开(公告)日：2016-09-29

申请号：US15176269

申请日：2016-06-08

申请人： Sun-Il SHIM ,  Jae-Hoon JANG ,  Donghyuk CHAE ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

发明人： Sun-Il SHIM ,  Jae-Hoon JANG ,  Donghyuk CHAE ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

IPC分类号： G11C16/34 ,  G11C16/10 ,  G11C16/08 ,  G11C16/04

CPC分类号： G11C16/3459 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/12 ,  G11C16/14 ,  G11C16/26 ,  G11C16/3418 ,  H01L27/1157 ,  H01L27/11582

摘要： Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.

摘要翻译： 非易失性存储器件，其操作方法和包括其的存储器系统。 非易失性存储器件可以包括存储单元阵列和字线驱动器。 存储单元阵列可以包括多个存储单元。 字线驱动器可以被配置为分别将字线电压施加到连接到多个存储器单元的多个字线。 字线电压的大小可以根据多个字线的位置来确定。

公开(公告)号：US20150380093A1

公开(公告)日：2015-12-31

申请号：US14849029

申请日：2015-09-09

申请人： Sun-il SHIM ,  Jae-Hoon JANG ,  Donghyuk CHAE ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

发明人： Sun-il SHIM ,  Jae-Hoon JANG ,  Donghyuk CHAE ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

IPC分类号： G11C16/12 ,  G11C16/34 ,  G11C16/04

CPC分类号： G11C16/3459 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/12 ,  G11C16/14 ,  G11C16/26 ,  G11C16/3418 ,  H01L27/1157 ,  H01L27/11582

摘要： Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.

摘要翻译： 非易失性存储器件，其操作方法和包括其的存储器系统。 非易失性存储器件可以包括存储单元阵列和字线驱动器。 存储单元阵列可以包括多个存储单元。 字线驱动器可以被配置为分别将字线电压施加到连接到多个存储器单元的多个字线。 字线电压的大小可以根据多个字线的位置来确定。

公开(公告)号：US20150348637A1

公开(公告)日：2015-12-03

申请号：US14820895

申请日：2015-08-07

申请人： Jinman HAN ,  Sun-Il SHIM ,  Donghyuk CHAE ,  Jae-Hoon JANG ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

发明人： Jinman HAN ,  Sun-Il SHIM ,  Donghyuk CHAE ,  Jae-Hoon JANG ,  Youngho LIM ,  Hansoo KIM ,  Jaehun JEONG

IPC分类号： G11C16/14 ,  G11C16/04

CPC分类号： G11C16/14 ,  G11C16/0466 ,  G11C16/0475 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/12 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3418 ,  H01L27/1157 ,  H01L27/11582

摘要： Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.