公开(公告)号：US20240243184A1

公开(公告)日：2024-07-18

申请号：US18434577

申请日：2024-02-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Yi PENG ,  Ching-Hua LEE ,  Song-Bor LEE

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/66439 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/775 ,  H01L29/78696

摘要： The structure of a semiconductor device with passivation layers on active regions of FET devices and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions disposed on the substrate, nanostructured channel regions disposed between the first and second S/D regions, a passivation layer, and a nanosheet (NS) structure wrapped around the nanostructured channel regions. Each of the S/D regions have a stack of first and second semiconductor layers arranged in an alternating configuration and an epitaxial region disposed on the stack of first and second semiconductor layers. A first portion of the passivation layer is disposed between the epitaxial region and the stack of first and second semiconductor layers and a second portion of the passivation layer is disposed on sidewalls of the nanostructured channel regions

公开(公告)号：US20230307522A1

公开(公告)日：2023-09-28

申请号：US18130296

申请日：2023-04-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Cheng-Yi PENG ,  Wen-Yuan CHEN ,  Wen-Hsing HSIEH ,  Yi-Ju HSU ,  Jon-Hsu HO ,  Song-Bor LEE ,  Bor-Zen TIEN

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L27/088 ,  H01L21/8234

CPC分类号： H01L29/66545 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L27/0886

摘要： A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.

公开(公告)号：US20240322011A1

公开(公告)日：2024-09-26

申请号：US18737803

申请日：2024-06-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Yi PENG ,  Wen-Yuan CHEN ,  Wen-Hsing HSIEH ,  Yi-Ju HSU ,  Jon-Hsu HO ,  Song-Bor LEE ,  Bor-Zen TIEN

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L21/8234 ,  H01L27/088

CPC分类号： H01L29/66545 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L27/0886

摘要： A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.

公开(公告)号：US20240282820A1

公开(公告)日：2024-08-22

申请号：US18638134

申请日：2024-04-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Yi PENG ,  Ting TSAI ,  Chung-Wei HUNG ,  Jung-Ting CHEN ,  Ying-Hua LAI ,  Song-Bor LEE ,  Bor-Zen TIEN

IPC分类号： H01L29/08 ,  H01L21/02 ,  H01L21/265 ,  H01L29/24 ,  H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/24 ,  H01L21/02521 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/26513 ,  H01L29/7848 ,  H01L29/785

摘要： A semiconductor device, includes a channel region, and a source/drain region adjacent to the channel region. The source/drain region includes a first epitaxial layer, a second epitaxial layer epitaxially formed on the first epitaxial layer and a third epitaxial layer epitaxially formed on the second epitaxial layer, and the first epitaxial layer is made of SiAs.

公开(公告)号：US20230411279A1

公开(公告)日：2023-12-21

申请号：US17845515

申请日：2022-06-21

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Liang-Hsuan PENG ,  Chih-Hung LU ,  Chih-Lin WANG ,  Song-Bor LEE

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L23/5226 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76802 ,  H01L21/76829

摘要： A semiconductor device structure, along with methods of forming such, are described. The structure includes an interconnect structure disposed over a substrate, a first conductive feature disposed in the interconnect structure, a dielectric layer disposed on the interconnect structure, and a second conductive feature having a top portion and a bottom portion. The top portion is disposed over the dielectric layer, and the bottom portion is disposed through the dielectric layer. The structure further includes an adhesion layer disposed over the dielectric layer and the second conductive feature. The adhesion layer includes a first portion disposed on a top of the second conductive feature and a second portion disposed over the dielectric layer, the first portion has a thickness, and the second portion has a width substantially greater than the thickness.

公开(公告)号：US20210359085A1

公开(公告)日：2021-11-18

申请号：US17385031

申请日：2021-07-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Cheng-Yi PENG ,  Ting TSAI ,  Chung-Wei HUNG ,  Jung-Ting CHEN ,  Ying-Hua LAI ,  Song-Bor LEE ,  Bor-Zen TIEN

IPC分类号： H01L29/08 ,  H01L29/24

摘要： A semiconductor device, includes a channel region, and a source/drain region adjacent to the channel region. The source/drain region includes a first epitaxial layer, a second epitaxial layer epitaxially formed on the first epitaxial layer and a third epitaxial layer epitaxially formed on the second epitaxial layer, and the first epitaxial layer is made of SiAs.

公开(公告)号：US20210351282A1

公开(公告)日：2021-11-11

申请号：US17379551

申请日：2021-07-19

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Cheng-Yi PENG ,  Wen-Yuan CHEN ,  Wen-Hsing HSIEH ,  Yi-Ju HSU ,  Jon-Hsu HO ,  Song-Bor LEE ,  Bor-Zen TIEN

IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/02

摘要： A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.