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公开(公告)号:US20150048518A1
公开(公告)日:2015-02-19
申请号:US14059102
申请日:2013-10-21
发明人: I-Chih Chen , Ying-Hao Chen , Chi-Cheng Jeng , Volume Chien , Fu-Tsun Tsai , Kun-Huei Lin
CPC分类号: H01L23/5226 , G06F17/5077 , H01L21/76805 , H01L21/76877 , H01L21/76897 , H01L23/3171 , H01L23/481 , H01L23/522 , H01L23/528 , H01L23/5283 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/94 , H01L25/50 , H01L2224/03616 , H01L2224/0401 , H01L2224/04026 , H01L2224/05022 , H01L2224/05085 , H01L2224/05092 , H01L2224/05124 , H01L2224/05147 , H01L2224/05184 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05684 , H01L2224/16145 , H01L2224/29006 , H01L2224/29186 , H01L2224/2919 , H01L2224/32145 , H01L2224/73204 , H01L2224/94 , H01L2924/0002 , H01L2924/3511 , H01L2924/00 , H01L2224/83 , H01L2924/00014 , H01L2224/81 , H01L2924/00012
摘要: A semiconductor device includes a first layer including a number of first layer metal pads, a second layer formed on top of the first layer, the second layer including a number of second layer metal pads, and vias connecting the first layer metal pads to the second layer metal pads. A surface area overlap between the first layer metal pads and the second layer metal pads is below a defined threshold.
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公开(公告)号:US09093430B2
公开(公告)日:2015-07-28
申请号:US14059102
申请日:2013-10-21
发明人: I-Chih Chen , Ying-Hao Chen , Chi-Cherng Jeng , Volume Chien , Fu-Tsun Tsai , Kun-Huei Lin
CPC分类号: H01L23/5226 , G06F17/5077 , H01L21/76805 , H01L21/76877 , H01L21/76897 , H01L23/3171 , H01L23/481 , H01L23/522 , H01L23/528 , H01L23/5283 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/94 , H01L25/50 , H01L2224/03616 , H01L2224/0401 , H01L2224/04026 , H01L2224/05022 , H01L2224/05085 , H01L2224/05092 , H01L2224/05124 , H01L2224/05147 , H01L2224/05184 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05684 , H01L2224/16145 , H01L2224/29006 , H01L2224/29186 , H01L2224/2919 , H01L2224/32145 , H01L2224/73204 , H01L2224/94 , H01L2924/0002 , H01L2924/3511 , H01L2924/00 , H01L2224/83 , H01L2924/00014 , H01L2224/81 , H01L2924/00012
摘要: A semiconductor device includes a first layer including a number of first layer metal pads, a second layer formed on top of the first layer, the second layer including a number of second layer metal pads, and vias connecting the first layer metal pads to the second layer metal pads. A surface area overlap between the first layer metal pads and the second layer metal pads is below a defined threshold.
摘要翻译: 半导体器件包括包括多个第一层金属焊盘的第一层,形成在第一层顶部上的第二层,第二层包括多个第二层金属焊盘,以及将第一层金属焊盘连接到第二层金属焊盘的通孔 层金属垫。 第一层金属焊盘和第二层金属焊盘之间的表面积重叠低于规定的阈值。
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公开(公告)号:US09559135B2
公开(公告)日:2017-01-31
申请号:US14464035
申请日:2014-08-20
发明人: Cheng-Yuan Li , Kun-Huei Lin , Chun-Hao Chou , Kuo-Cheng Lee , Yung-Lung Hsu
IPC分类号: H01L23/48 , H01L27/146 , H01L31/18 , H01L31/02
CPC分类号: H01L27/14636 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14634 , H01L27/1464 , H01L27/1469 , H01L31/02002
摘要: A semiconductor device includes a first semiconductor chip comprising a first metallic structure and a second semiconductor chip comprising a second metallic structure. The second semiconductor chip is bonded with the first semiconductor chip by a first conductive plug. A second conductive plug extends from the first metallic structure and into a substrate of the first semiconductor chip. The first conductive plug connects the first metallic structure and the second metallic structure, wherein a conductive liner is along a sidewall of the first conductive plug or the second conductive plug.
摘要翻译: 半导体器件包括包括第一金属结构的第一半导体芯片和包括第二金属结构的第二半导体芯片。 第二半导体芯片通过第一导电插塞与第一半导体芯片接合。 第二导电插塞从第一金属结构延伸到第一半导体芯片的衬底中。 第一导电插头连接第一金属结构和第二金属结构,其中导电衬垫沿着第一导电插塞或第二导电插塞的侧壁。
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公开(公告)号:US20150333007A1
公开(公告)日:2015-11-19
申请号:US14809580
申请日:2015-07-27
发明人: I-Chih Chen , Ying-Hao Chen , Chi-Cherng Jeng , Volume Chien , Fu-Tsun Tsai , Kun-Huei Lin
IPC分类号: H01L23/522 , H01L23/528 , H01L21/768 , H01L23/31
CPC分类号: H01L23/5226 , G06F17/5077 , H01L21/76805 , H01L21/76877 , H01L21/76897 , H01L23/3171 , H01L23/481 , H01L23/522 , H01L23/528 , H01L23/5283 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/94 , H01L25/50 , H01L2224/03616 , H01L2224/0401 , H01L2224/04026 , H01L2224/05022 , H01L2224/05085 , H01L2224/05092 , H01L2224/05124 , H01L2224/05147 , H01L2224/05184 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05684 , H01L2224/16145 , H01L2224/29006 , H01L2224/29186 , H01L2224/2919 , H01L2224/32145 , H01L2224/73204 , H01L2224/94 , H01L2924/0002 , H01L2924/3511 , H01L2924/00 , H01L2224/83 , H01L2924/00014 , H01L2224/81 , H01L2924/00012
摘要: A semiconductor device includes a first layer including a number of first layer metal pads, a second layer formed on top of the first layer, the second layer including a number of second layer metal pads, and vias connecting the first layer metal pads to the second layer metal pads. A surface area overlap between the first layer metal pads and the second layer metal pads is below a defined threshold.
摘要翻译: 半导体器件包括包括多个第一层金属焊盘的第一层,形成在第一层顶部上的第二层,第二层包括多个第二层金属焊盘,以及将第一层金属焊盘连接到第二层金属焊盘的通孔 层金属垫。 第一层金属焊盘和第二层金属焊盘之间的表面积重叠低于规定的阈值。
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公开(公告)号:US09659859B2
公开(公告)日:2017-05-23
申请号:US14809580
申请日:2015-07-27
发明人: I-Chih Chen , Ying-Hao Chen , Chi-Cherng Jeng , Volume Chien , Fu-Tsun Tsai , Kun-Huei Lin
IPC分类号: H01L23/522 , H01L23/48 , G06F17/50 , H01L23/31 , H01L23/528 , H01L21/768 , H01L23/532 , H01L23/00
CPC分类号: H01L23/5226 , G06F17/5077 , H01L21/76805 , H01L21/76877 , H01L21/76897 , H01L23/3171 , H01L23/481 , H01L23/522 , H01L23/528 , H01L23/5283 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/94 , H01L25/50 , H01L2224/03616 , H01L2224/0401 , H01L2224/04026 , H01L2224/05022 , H01L2224/05085 , H01L2224/05092 , H01L2224/05124 , H01L2224/05147 , H01L2224/05184 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05684 , H01L2224/16145 , H01L2224/29006 , H01L2224/29186 , H01L2224/2919 , H01L2224/32145 , H01L2224/73204 , H01L2224/94 , H01L2924/0002 , H01L2924/3511 , H01L2924/00 , H01L2224/83 , H01L2924/00014 , H01L2224/81 , H01L2924/00012
摘要: A semiconductor device includes a first layer including a number of first layer metal pads, a second layer formed on top of the first layer, the second layer including a number of second layer metal pads, and vias connecting the first layer metal pads to the second layer metal pads. A surface area overlap between the first layer metal pads and the second layer metal pads is below a defined threshold.
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