公开(公告)号：US20220221353A1

公开(公告)日：2022-07-14

申请号：US17538782

申请日：2021-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tobias Bernhard FRITZ ,  Baher S. HAROUN ,  Benjamin Stassen COOK ,  Sreenivasan Kalyani KODURI ,  Michael SZELONG ,  Ernst MUELLNER

IPC: G01L1/18 ,  H01L23/31 ,  H01L23/495

Abstract: A force sensor including a semiconductor die, and a die pad coupled to the semiconductor die, the semiconductor die configured to detect a force in the die pad. In addition, the force sensor includes a mold compound covering the semiconductor die and having an outer perimeter, a first side, and a second side opposite the first side, the outer perimeter extending between the first side and the second side, the die pad exposed out of the mold compound along the first side. Further, the force sensor includes a mounting frame engaged with the die pad along the second side of the mold compound, the mounting frame including multiple mounting pads extended outward in multiple directions from the outer perimeter.

公开(公告)号：US20220223486A1

公开(公告)日：2022-07-14

申请号：US17538850

申请日：2021-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tobias Bernhard FRITZ ,  Baher S. HAROUN ,  Benjamin Stassen COOK ,  Michael SZELONG ,  Ernst MUELLNER ,  Jeronimo SEGOVIA-FERNANDEZ

IPC: H01L23/13 ,  H01L23/31 ,  H01L23/495 ,  G01L1/18

Abstract: An example semiconductor package includes a semiconductor die configured to detect a force. In addition, the semiconductor package includes a mold compound covering the semiconductor die. Further, the semiconductor package includes an engagement surface including a pattern of projections adapted to engage with a mounting surface on a member of interest.

公开(公告)号：US20200227408A1

公开(公告)日：2020-07-16

申请号：US16428682

申请日：2019-05-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael SZELONG ,  James Robert TODD ,  Tobias Bernhard FRITZ ,  Ralf Peter BREDERLOW

IPC: H01L27/08 ,  H01L49/02 ,  G01L1/18

Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.

公开(公告)号：US20250076093A1

公开(公告)日：2025-03-06

申请号：US18459056

申请日：2023-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sebastian MEIER ,  Rujuta MUNJE ,  Tobias Bernhard FRITZ ,  Sreenivasan Kalyani KODURI

IPC: G01F1/64 ,  G01F1/002

Abstract: In examples, a sensing device comprises a semiconductor die including a device side and a fluid sensor in the device side. The device comprises a metal ring forming an opening over the fluid sensor, the metal ring having a top surface, a bottom surface, and an inner surface extending between the top surface and the bottom surface, and the bottom surface being on the device side. At least a portion of the inner surface abuts the device side being plated with a noble metal. The device includes a mold compound covering the semiconductor die and a first portion of the metal ring, in which a second portion of the metal ring having the top surface protrudes out of the mold compound and provides at least one of a cartridge interface or a tube interface.

公开(公告)号：US20220223488A1

公开(公告)日：2022-07-14

申请号：US17538820

申请日：2021-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tobias Bernhard FRITZ ,  Marcus Rudolf ZIMNIK

IPC: H01L23/31 ,  H01L23/14 ,  G01L1/18

Abstract: An example semiconductor package includes a semiconductor die. In addition, the semiconductor package includes a mold compound having a first side, a second side opposite the first side, and an axis extending between the first side and the second side, the mold compound covering the semiconductor die. Further, the semiconductor package includes an interface member including a first portion and a second portion, the first portion is coupled to the second portion. The first portion is positioned along the first side, the second portion is positioned along the second side, and an engagement of a welding horn with the first portion is adapted to weld the second portion to a surface.

公开(公告)号：US20220173095A1

公开(公告)日：2022-06-02

申请号：US17675066

申请日：2022-02-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael SZELONG ,  James Robert TODD ,  Tobias Bernhard FRITZ ,  Ralf Peter BREDERLOW

IPC: H01L27/08 ,  G01L1/18 ,  H01L49/02

Abstract: An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.