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Patent Agency Ranking
1.发明申请CURRENT APERTURE VERTICAL ELECTRON TRANSISTORS WITH AMMONIA MOLECULAR BEAM EPITAXY GROWN P-TYPE GALLIUM NITRIDE AS A CURRENT BLOCKING LAYER 审中-公开具有氨基分子束的电流垂直电子晶体管外延生长P型氮化镓作为电流阻塞层公开(公告)号：US20150137137A1
公开(公告)日：2015-05-21
申请号：US14566443
申请日：2014-12-10
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Srabanti Chowdhury , Ramya Yeluri , Christophe Hurni , Umesh K. Mishra , Ilan Ben-Yaacov
IPC: H01L29/778 , H01L29/201 , H01L29/205 , H01L29/20
CPC classification number: H01L29/7787 , H01L29/0646 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/41766 , H01L29/66204 , H01L29/66462 , H01L29/7788 , H01L29/861
Abstract: A current aperture vertical electron transistor (CAVET) with ammonia (NH3) based molecular beam epitaxy (MBE) grown p-type Gallium Nitride (p-GaN) as a current blocking layer (CBL). Specifically, the CAVET features an active buried Magnesium (Mg) doped GaN layer for current blocking purposes. This structure is very advantageous for high power switching applications and for any device that requires a buried active p-GaN layer for its functionality.
Abstract translation: 具有基于氨（NH3）的分子束外延（MBE）的电流孔径垂直电子晶体管（CAVET）生长的p型氮化镓（p-GaN）作为电流阻挡层（CBL）。 具体来说，CAVET具有用于电流阻塞目的的有源掩埋的镁（Mg）掺杂的GaN层。 这种结构对于大功率开关应用以及需要掩埋有源p-GaN层用于其功能的任何器件是非常有利的。
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公开(公告)号：US20160163846A1
公开(公告)日：2016-06-09
申请号：US15009509
申请日：2016-01-28
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Xiang Liu , Umesh K. Mishra , Stacia Keller , Jeonghee Kim , Matthew Laurent , Jing Lu , Ramya Yeluri , Silvia H. Chan
IPC: H01L29/778 , H01L29/66
CPC classification number: H01L29/7787 , C30B25/02 , C30B29/20 , C30B29/406 , H01L21/02178 , H01L21/02271 , H01L21/0254 , H01L21/0257 , H01L21/0262 , H01L21/28264 , H01L29/2003 , H01L29/517 , H01L29/66462 , H01L29/7781
Abstract: A method of fabricating a III-nitride semiconductor device, including growing an III-nitride semiconductor and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor.
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3.发明申请METALORGANIC CHEMICAL VAPOR DEPOSITION OF OXIDE DIELECTRICS ON N-POLAR III-NITRIDE SEMICONDUCTORS WITH HIGH INTERFACE QUALITY AND TUNABLE FIXED INTERFACE CHARGE 有权金属化学气相沉积在具有高界面质量和可调固定界面电荷的N-极III-氮化物半导体上的氧化物电介质公开(公告)号：US20150200286A1
公开(公告)日：2015-07-16
申请号：US14597989
申请日：2015-01-15
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Xiang Liu , Umesh K. Mishra , Stacia Keller , Jeonghee Kim , Matthew Laurent , Jing Lu , Ramya Yeluri , Silvia H. Chan
IPC: H01L29/778 , H01L21/02 , H01L29/66
CPC classification number: H01L29/7787 , C30B25/02 , C30B29/20 , C30B29/406 , H01L21/02178 , H01L21/02271 , H01L21/0254 , H01L21/0257 , H01L21/0262 , H01L21/28264 , H01L29/2003 , H01L29/517 , H01L29/66462 , H01L29/7781
Abstract: A method of fabricating a III-nitride semiconductor device, including growing an III-nitride semiconductor and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor.
Abstract translation: 一种制造III族氮化物半导体器件的方法，包括在氧化物生长和III族氮化物半导体的生长之间不暴露于空气中，依次生长III族氮化物半导体和氧化物以形成氧化物/ III族氮化物界面 。
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4.发明授权Current aperture vertical electron transistors with ammonia molecular beam epitaxy grown p-type gallium nitride as a current blocking layer 有权具有氨分子束外延生长的p型氮化镓作为电流阻挡层的电流孔径垂直电子晶体管公开(公告)号：US09590088B2
公开(公告)日：2017-03-07
申请号：US14566443
申请日：2014-12-10
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Srabanti Chowdhury , Ramya Yeluri , Christophe Hurni , Umesh K. Mishra , Ilan Ben-Yaacov
IPC: H01L29/778 , H01L29/66 , H01L29/861 , H01L29/06 , H01L29/20 , H01L29/201 , H01L29/205 , H01L29/417
CPC classification number: H01L29/7787 , H01L29/0646 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/41766 , H01L29/66204 , H01L29/66462 , H01L29/7788 , H01L29/861
Abstract: A current aperture vertical electron transistor (CAVET) with ammonia (NH3) based molecular beam epitaxy (MBE) grown p-type Gallium Nitride (p-GaN) as a current blocking layer (CBL). Specifically, the CAVET features an active buried Magnesium (Mg) doped GaN layer for current blocking purposes. This structure is very advantageous for high power switching applications and for any device that requires a buried active p-GaN layer for its functionality.
Abstract translation: 具有基于氨（NH3）的分子束外延（MBE）的电流孔径垂直电子晶体管（CAVET）生长的p型氮化镓（p-GaN）作为电流阻挡层（CBL）。 具体来说，CAVET具有用于电流阻塞目的的有源掩埋的镁（Mg）掺杂的GaN层。 这种结构对于大功率开关应用以及需要掩埋有源p-GaN层用于其功能的任何器件是非常有利的。
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5.发明授权Metalorganic chemical vapor deposition of oxide dielectrics on N-polar III-nitride semiconductors with high interface quality and tunable fixed interface charge 有权在具有高界面质量和可调谐固定界面电荷的N-极性III族氮化物半导体上的氧化物电介质的金属有机化学气相沉积公开(公告)号：US09281183B2
公开(公告)日：2016-03-08
申请号：US14597989
申请日：2015-01-15
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Xiang Liu , Umesh K. Mishra , Stacia Keller , Jeonghee Kim , Matthew Laurent , Jing Lu , Ramya Yeluri , Silvia H. Chan
CPC classification number: H01L29/7787 , C30B25/02 , C30B29/20 , C30B29/406 , H01L21/02178 , H01L21/02271 , H01L21/0254 , H01L21/0257 , H01L21/0262 , H01L21/28264 , H01L29/2003 , H01L29/517 , H01L29/66462 , H01L29/7781
Abstract: A method of fabricating a III-nitride semiconductor device, including growing an III-nitride semiconductor and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor.
Abstract translation: 一种制造III族氮化物半导体器件的方法，包括在氧化物生长和III族氮化物半导体的生长之间不暴露于空气中，依次生长III族氮化物半导体和氧化物以形成氧化物/ III族氮化物界面 。
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