公开(公告)号：US10593694B2

公开(公告)日：2020-03-17

申请号：US16162667

申请日：2018-10-17

Applicant: Toshiba Memory Corporation

Inventor： Hirotaka Tsuda ,  Yusuke Oshiki

IPC: H01L27/11582 ,  H01L21/311 ,  H01L21/02 ,  H01L27/11565 ,  H01L29/66 ,  H01L29/792

Abstract: According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connecting at least two or more second holes to form a groove. The method includes forming a film including a charge storage film on a sidewall of the first holes. The method includes forming a channel film on a sidewall of the film including the charge storage film.

公开(公告)号：US10141329B2

公开(公告)日：2018-11-27

申请号：US15440025

申请日：2017-02-23

Applicant: Toshiba Memory Corporation

Inventor： Hirotaka Tsuda ,  Yusuke Oshiki

IPC: H01L27/11582 ,  H01L21/311 ,  H01L21/02 ,  H01L27/11565 ,  H01L29/66 ,  H01L29/792

Abstract: According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connecting at least two or more second holes to form a groove. The method includes forming a film including a charge storage film on a sidewall of the first holes. The method includes forming a channel film on a sidewall of the film including the charge storage film.

公开(公告)号：US10535677B2

公开(公告)日：2020-01-14

申请号：US16104209

申请日：2018-08-17

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Yusuke Oshiki

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L27/11524 ,  H01L27/11536 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11565 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/28

Abstract: A semiconductor memory device according to an embodiment includes: a semiconductor substrate; an insulating film provided on the semiconductor substrate; a conductive layer group including at least two conductive layers; a stacked body provided on the conductive layer group and including a plurality of films stacked; a memory film provided in a hole, the hole penetrating the stacked body and a part of the conductive layer group; and a slit splitting the stacked body and terminating at a position deeper than a contact portion between the conductive layer group and the memory film. The conductive layer group has a band-shaped part projecting to the stacked body side at a portion of the hole, and a groove part recessed to the semiconductor substrate side at a portion under the slit.

公开(公告)号：US10153164B2

公开(公告)日：2018-12-11

申请号：US15661252

申请日：2017-07-27

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Shinichi Nakao ,  Shunsuke Ochiai ,  Yusuke Oshiki ,  Kei Watanabe ,  Mitsuhiro Omura

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/768 ,  H01L21/3065 ,  H01L29/788 ,  H01L29/792 ,  H01L27/115 ,  H01L27/1157 ,  H01L27/11582

Abstract: A method for manufacturing a semiconductor device includes forming a mask layer including a) one metal from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium, b) boron, and c) carbon on a layer to be etched. The mask layer is patterned. A hole or a groove is formed in the layer to be etched by performing dry etching on the layer to be etched using the patterned mask layer. The mask layer includes a first region and a second region. The first region includes boron and the second region includes boron such that a density of boron in the second region is different from a density of boron in the first region, or the first region includes carbon and the second region includes carbon such that a density of carbon in the second region is different from a density of carbon in the first region.

公开(公告)号：US09754793B2

公开(公告)日：2017-09-05

申请号：US15376336

申请日：2016-12-12

Applicant: Toshiba Memory Corporation

Inventor： Shinichi Nakao ,  Shunsuke Ochiai ,  Yusuke Oshiki ,  Kei Watanabe ,  Mitsuhiro Omura ,  Kosuke Horibe ,  Atsuko Sakata ,  Junichi Wada ,  Soichi Yamazaki ,  Masayuki Kitamura ,  Yuya Matsubara

IPC: H01L21/336 ,  H01L21/3065 ,  H01L21/308 ,  H01L27/11582

CPC classification number: H01L21/3065 ,  H01L21/3081 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/5226 ,  H01L27/11582 ,  H01L28/00

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched, the mask layer containing tungsten and boron, a composition ratio of the tungsten being not less than 30%, patterning the mask layer, and performing a dry etching to the layer to be etched using the mask layer being patterned, and forming a hole or a slit in the layer to be etched.

公开(公告)号：US20200176469A1

公开(公告)日：2020-06-04

申请号：US16780935

申请日：2020-02-04

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Hirotaka TSUDA ,  Yusuke Oshiki

IPC: H01L27/11582 ,  H01L29/792 ,  H01L29/66 ,  H01L27/11565 ,  H01L21/311 ,  H01L21/02

Abstract: According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connecting at least two or more second holes to form a groove. The method includes forming a film including a charge storage film on a sidewall of the first holes. The method includes forming a channel film on a sidewall of the film including the charge storage film.

公开(公告)号：US10290595B2

公开(公告)日：2019-05-14

申请号：US15696717

申请日：2017-09-06

Applicant: Toshiba Memory Corporation

Inventor： Yusuke Oshiki

IPC: H01L23/60 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/11565 ,  H01L27/11575

Abstract: According to an embodiment, a semiconductor memory device includes a substrate, an insulating film, a plurality of conductive films, an insulating member, a plurality of stacked bodies, and a first member. The insulating member is provided on the insulating film, is positioned between the conductive films in a first direction along the substrate, and extends in a second direction along the substrate, the second direction crossing the first direction. The first member is provided on the insulating member, is positioned between the stacked bodies in the first direction, and extends in a stacking direction of the plurality of electrode films of the stacked bodies. A width in the first direction of the insulating member is larger than a width in the first direction of the first member.