公开(公告)号：US20140355170A1

公开(公告)日：2014-12-04

申请号：US14345279

申请日：2012-09-27

Applicant: TOTO LTD.

Inventor： Takuma Wada ,  Kazuki Anada

IPC: H01L21/683

CPC classification number: H01L21/6831 ,  B23Q3/1543 ,  H01L21/67109 ,  H01L21/6833 ,  H01L21/6875

Abstract: An electrostatic chuck includes: a ceramic dielectric substrate having a first major surface and a second major surface; an electrode interposed between the first and second major surfaces; and a connecting part connected to the electrode and including a first region in contact with the electrode, with a first direction being defined as a direction from the first major surface toward the second major surface, and a second direction being defined as a direction orthogonal to the first direction, the first region being configured so that in a cross section of the electrode and the connecting part as viewed in the second direction, an angle on a side of the connecting part between an extension line along outer shape on the side of second major surface of the electrode and a tangential line of outer shape of the connecting part gradually increases in the first direction.

Abstract translation: 静电卡盘包括：具有第一主表面和第二主表面的陶瓷电介质基片; 插入在第一和第二主表面之间的电极; 以及连接部，其与电极连接并且包括与电极接触的第一区域，第一方向被定义为从第一主表面朝向第二主表面的方向，第二方向被定义为与 所述第一方向，所述第一区域被构造为使得在所述电极和所述连接部分的横截面中沿着所述第二方向观察到所述连接部分的沿着外侧的延伸线在所述第二方向上的角度 电极的主表面和连接部的外形的切线在第一方向上逐渐增大。

公开(公告)号：US12051568B2

公开(公告)日：2024-07-30

申请号：US16802666

申请日：2020-02-27

Applicant: TOTO LTD.

Inventor： Yasutaka Nitta ,  Takuma Wada ,  Ryoto Takizawa

IPC: H01J37/32 ,  C23C16/458 ,  H01L21/67 ,  H01L21/683

CPC classification number: H01J37/32477 ,  C23C16/4583 ,  H01J37/32715 ,  H01L21/67011 ,  H01L21/6831 ,  H01J2237/2007

Abstract: According to one embodiment, a semiconductor manufacturing apparatus member includes a base and a particle-resistant layer. The base includes a first surface, a second surface crossing the first surface, and an edge portion connecting the first surface and the second surface. The particle-resistant layer includes a polycrystalline ceramic and covering the first surface, the second surface, and the edge portion. The particle-resistant layer includes a first particle-resistant layer provided at the edge portion, and a second particle-resistant layer provided at the first surface. A particle resistance of the first particle-resistant layer is higher than a particle resistance of the second particle-resistant layer.

公开(公告)号：US11939678B2

公开(公告)日：2024-03-26

申请号：US17533579

申请日：2021-11-23

Applicant: TOTO LTD.

Inventor： Yasutaka Nitta ,  Takuma Wada

IPC: C23C24/04 ,  H01J37/32 ,  C23C16/44 ,  H01L21/687

CPC classification number: C23C24/04 ,  H01J37/321 ,  H01J37/32477 ,  H01J37/32715 ,  C23C16/4404 ,  H01J2237/2007 ,  H01J2237/3341 ,  H01L21/68757

Abstract: A method of making a semiconductor manufacturing apparatus member includes a step of preparing an aluminum base having an alumite layer having a porous columnar structure at an upper surface thereof. The alumite layer is an anodic oxidation film, and a Young's modulus of the alumite layer is between 90 GPa and 120 GPa. The method also includes a step of forming a particle-resistant layer on the alumite layer by aerosol deposition, in which an aerosol containing fine particles of a brittle material dispersed in a gas is ejected from a nozzle to impact against a surface of the alumite layer, wherein the particle-resistant layer includes a polycrystalline ceramic; and wherein, when the resulting semiconductor manufacturing apparatus member is exposed to a plasma in a reference plasma resistance test, the particle-resistant layer has an arithmetic average height Sa of 0.060 or less after the reference plasma test is completed.

公开(公告)号：US10759710B2

公开(公告)日：2020-09-01

申请号：US16296934

申请日：2019-03-08

Applicant: TOTO LTD.

Inventor： Junichi Iwasawa ,  Hiroaki Ashizawa ,  Takuma Wada ,  Ryoto Takizawa ,  Toshihiro Aoshima ,  Yuuki Takahashi ,  Atsushi Kinjo

IPC: B32B9/00 ,  C04B35/505 ,  C01B11/24 ,  C01F7/02 ,  C01G25/02 ,  C04B35/622 ,  H01J37/28 ,  H01L21/67 ,  H01L21/687 ,  C01F17/206 ,  C01F17/265

Abstract: Disclosed is provision of a ceramic coat having an excellent low-particle generation as well as a method for assessing the low-particle generation of the ceramic coat. A composite structure including a substrate and a structure which is formed on the substrate and has a surface, wherein the structure includes a polycrystalline ceramic and the composite structure has luminance Sa satisfying a specific value calculated from a TEM image analysis thereof, can be suitably used as an inner member of a semiconductor manufacturing apparatus required to have a low-particle generation.

公开(公告)号：US11117356B2

公开(公告)日：2021-09-14

申请号：US16333161

申请日：2017-09-14

Applicant: TOTO LTD.

Inventor： Takuma Wada

IPC: B32B27/14 ,  C23C24/04 ,  B32B9/04

Abstract: The composite structure of the present invention includes a substrate, and a structure provided on the substrate surface and having a brittle material as the principal component thereof. The structure is polycrystalline, and the average crystallite size is 100 nm or less. The substrate includes at least a first region containing the substrate surface. The first region includes a filler and a matrix which has a first resin as the principal component thereof. The diameter of 90% of the filler particles (D90) is 1.0-60 μm, inclusive. The surface area fill rate of the filler at the substrate surface per unit area is greater than 10% and no greater than 70%.

公开(公告)号：US09252040B2

公开(公告)日：2016-02-02

申请号：US14012003

申请日：2013-08-28

Applicant: TOTO LTD.

Inventor： Kazuki Anada ,  Takuma Wada

IPC: H01L21/683 ,  H01L21/687

CPC classification number: H01L21/6833 ,  H01L21/68757

Abstract: To provide an electrostatic chuck, including: a ceramic dielectric substrate having a first major surface on which an object to be processed is mounted, and a second major surface on a side opposite the first major surface, the ceramic dielectric substrate being a polycrystalline ceramic sintered body; and an electrode layer interposed between the first major surface and the second major surface of the ceramic dielectric substrate, the electrode layer being integrally sintered with the ceramic dielectric substrate, the ceramic dielectric substrate including a first dielectric layer between the electrode layer and the first major surface, and a second dielectric layer between the electrode layer and the second major surface, and at least the first dielectric layer of the ceramic dielectric substrate having an infrared spectral transmittance in terms of a thickness of 1 millimeter (mm) of not less than 20%.

Abstract translation: 为了提供一种静电卡盘，其特征在于，包括：陶瓷电介质基板，其具有安装有被加工物的第一主面和与所述第一主面相反的一侧的第二主面，所述陶瓷电介质基板为多晶陶瓷烧结体 身体; 以及插入在所述陶瓷电介质基板的所述第一主表面和所述第二主表面之间的电极层，所述电极层与所述陶瓷电介质基板一体烧结，所述陶瓷电介质基板包括在所述电极层与所述第一主体之间的第一电介质层 表面和第二电介质层之间，并且至少陶瓷电介质基板的第一电介质层的厚度为1毫米（mm）的红外光谱透射率不小于20 ％。

公开(公告)号：US11142829B2

公开(公告)日：2021-10-12

申请号：US16802180

申请日：2020-02-26

Applicant: TOTO LTD.

Inventor： Yasutaka Nitta ,  Takuma Wada

IPC: H01L21/67 ,  C23C28/04 ,  H01J37/32 ,  C23C30/00

Abstract: According to one embodiment, a semiconductor manufacturing apparatus member includes a base and a particle-resistant layer. The base includes a main portion and an alumite layer. The main portion includes aluminum. The alumite layer is provided at a front surface of the main portion. The particle-resistant layer is provided on the alumite layer and includes a polycrystalline ceramic. An Al purity of the main portion is 99.00% or more.

公开(公告)号：US10714373B2

公开(公告)日：2020-07-14

申请号：US15788132

申请日：2017-10-19

Applicant: TOTO LTD.

Inventor： Kazuki Anada ,  Yuichi Yoshii ,  Takuma Wada

IPC: H01L21/683 ,  H01L21/687 ,  H01L21/67

Abstract: According to one embodiment, an electrostatic chuck includes a ceramic dielectric substrate including a sealing ring provided at a peripheral edge portion of the ceramic dielectric substrate, and an electrode layer including a plurality of electrode components. An outer perimeter of the ceramic dielectric substrate is provided to cause a spacing between the outer perimeter of the ceramic dielectric substrate and an outer perimeter of the electrode layer to be uniform. The spacing between the outer perimeter of the electrode layer and the outer perimeter of the ceramic dielectric substrate is narrower than a spacing of the electrode components. A width of the sealing ring is not less than 0.3 millimeters and not more than 3 millimeters. A width where the electrode layer overlaps the sealing ring is not less than −0.7 millimeters and not more than 2 millimeters.

公开(公告)号：US09252041B2

公开(公告)日：2016-02-02

申请号：US14012058

申请日：2013-08-28

Applicant: TOTO LTD.

Inventor： Kazuki Anada ,  Takuma Wada

IPC: H01L21/683 ,  H01L21/687

CPC classification number: H01L21/6833 ,  H01L21/68757

Abstract: To provide an electrostatic chuck, including: a ceramic dielectric substrate having a first major surface on which an object to be processed is mounted, and a second major surface on a side opposite the first major surface, the ceramic dielectric substrate being a polycrystalline ceramic sintered body; and an electrode layer interposed between the first major surface and the second major surface of the ceramic dielectric substrate, the electrode layer being integrally sintered with the ceramic dielectric substrate, and the electrode layer includes a first portion having conductivity, and a second portion that bonds the first dielectric layer and the second dielectric layer, and the mean grain size of crystals included in the second portion is smaller than the mean grain size of crystals included in the ceramic dielectric substrate.

Abstract translation: 为了提供一种静电卡盘，其特征在于，包括：陶瓷电介质基板，其具有安装有被加工物的第一主面和与所述第一主面相反的一侧的第二主面，所述陶瓷电介质基板为多晶陶瓷烧结体 身体; 以及插入在所述陶瓷电介质基板的所述第一主表面和所述第二主表面之间的电极层，所述电极层与所述陶瓷电介质基板一体烧结，所述电极层包括具有导电性的第一部分， 第一介电层和第二介电层以及包含在第二部分中的晶体的平均晶粒尺寸小于包括在陶瓷电介质基板中的晶体的平均晶粒尺寸。

公开(公告)号：US20190240961A1

公开(公告)日：2019-08-08

申请号：US16333161

申请日：2017-09-14

Applicant: TOTO LTD.

Inventor： Takuma Wada

IPC: B32B27/14 ,  C23C24/04

CPC classification number: B32B27/14 ,  B32B9/04 ,  B32B2264/10 ,  B32B2307/538 ,  B32B2307/732 ,  C23C24/04

Abstract: The composite structure of the present invention includes a substrate, and a structure provided on the substrate surface and having a brittle material as the principal component thereof. The structure is polycrystalline, and the average crystallite size is 100 nm or less. The substrate includes at least a first region containing the substrate surface. The first region includes a filler and a matrix which has a first resin as the principal component thereof. The diameter of 90% of the filler particles (D90) is 1.0-60 μm, inclusive. The surface area fill rate of the filler at the substrate surface per unit area is greater than 10% and no greater than 70%.