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公开(公告)号：US11407636B2
公开(公告)日：2022-08-09
申请号：US16122180
申请日：2018-09-05
发明人： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Shiuan-Jeng Lin , Wei-Ding Wu , Ching-Hsiang Hu
摘要： The present disclosure, in some embodiments, relates to a method of forming a micro-electromechanical system (MEMS) package. The method includes forming one or more depressions within a capping substrate. A back-side of a MEMS substrate is bonded to the capping substrate after forming the one or more depressions, so that the one or more depressions define one or more cavities between the capping substrate and the MEMS substrate. A front-side of the MEMS substrate is selectively etched to form one or more trenches extending through the MEMS substrate, and one or more polysilicon vias are formed within the one or more trenches. A conductive bonding structure is formed on the front-side of the MEMS substrate at a location contacting the one or more polysilicon vias. The MEMS substrate is bonded to a CMOS substrate having one or more semiconductor devices by way of the conductive bonding structure.
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公开(公告)号：US20170107097A1
公开(公告)日：2017-04-20
申请号：US14980297
申请日：2015-12-28
发明人： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Shiuan-Jeng Lin , Wei-Ding Wu , Ching-Hsiang Hu
CPC分类号： B81B7/007 , B81B7/0006 , B81B2207/012 , B81B2207/096 , B81C1/00238 , B81C1/00301 , B81C2201/013 , B81C2203/0109 , B81C2203/0118 , B81C2203/037 , B81C2203/0792
摘要： The present disclosure relates to micro-electromechanical system (MEMS) package that uses polysilicon inter-tier connections to provide for a low parasitic capacitance in MEM device signals, and a method of formation. In some embodiments, the MEMS package has a CMOS substrate with one or more semiconductor devices arranged within a semiconductor body. A MEMS substrate having an ambulatory element is connected to the CMOS substrate by a conductive bonding structure. The conductive bonding structure is arranged on a front-side of the MEMS substrate at a location laterally offset from the ambulatory element. One or more polysilicon vias extend through the conductive MEMS substrate to the bonding structure. The one or more polysilicon vias are configured to electrically couple the MEMS substrate to the CMOS substrate. By connecting the MEMS substrate to the CMOS substrate using the polysilicon vias, the parasitic capacitance and form factor of the MEMS package are reduced.
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3.发明授权公开(公告)号：US12100604B2
公开(公告)日：2024-09-24
申请号：US17872941
申请日：2022-07-25
发明人： Chih-Yu Wang
CPC分类号： H01L21/67253 , G06T1/0014 , G06T7/0004 , H01J37/32944 , H01L21/67017 , H01L21/67288 , G06T2207/10016 , G06T2207/20081 , H01J2237/24507
摘要： A plasma discharge detection system detects undesirable plasma discharge events within a semiconductor process chamber. The plasma discharge detection system includes one or more cameras positioned around the semiconductor process chamber. The cameras capture images from within the semiconductor process chamber. The plasma discharge detection system includes a control system that receives the images from the cameras. The control system analyzes the images and detects plasma discharge within the semiconductor process chamber based on the images. The control system can adjust a semiconductor process in real time responsive to detecting the plasma discharge.
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公开(公告)号：US11688413B2
公开(公告)日：2023-06-27
申请号：US16721684
申请日：2019-12-19
发明人： Chih-Yu Wang
CPC分类号： G10L25/51 , G06N20/00 , H01L21/67017 , H01L21/67253 , H01L22/26 , H04R1/406 , H04R3/007 , H04R3/04
摘要： An arcing detection system detects arcing within a semiconductor processing cleanroom environment. The arcing detection system includes an array of microphones positioned within the cleanroom environment. The microphones receive soundwaves within the cleanroom environment and generate audio signals based on the sound waves. The arcing system includes a control system that receives the audio signals from the microphones. The control system analyzes the audio signals and detects arcing within the cleanroom environment based on the audio signals. The control system can adjust a semiconductor process in real time responsive to detecting arcing.
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公开(公告)号：US10532925B2
公开(公告)日：2020-01-14
申请号：US16114521
申请日：2018-08-28
发明人： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Hsin-Yu Chen , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
摘要： The present disclosure relates to a micro-electromechanical system (MEMs) package. In some embodiments, the MEMs package has a plurality of conductive interconnect layers disposed within a dielectric structure over an upper surface of a first substrate. A heating element is electrically coupled to a semiconductor device within the first substrate by one or more of the plurality of conductive interconnect layers. The heating element is vertically separated from the first substrate by the dielectric structure. A MEMs substrate is coupled to the first substrate and has a MEMs device. A hermetically sealed chamber surrounding the MEMs device is disposed between the first substrate and the MEMs substrate. An out-gassing material is disposed laterally between the hermetically sealed chamber and the heating element.
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公开(公告)号：US10131536B2
公开(公告)日：2018-11-20
申请号：US15176365
申请日：2016-06-08
发明人： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Hsin-Yu Chen , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
摘要： The present disclosure relates to a MEMs package having a heating element configured to adjust a pressure within a hermetically sealed chamber by inducing out-gassing of into the chamber, and an associated method. In some embodiments, the MEMs package has a CMOS substrate having one or more semiconductor devices arranged within a semiconductor body. A MEMs structure is connected to the CMOS substrate and has a micro-electromechanical (MEMs) device. The CMOS substrate and the MEMs structure form a hermetically sealed chamber abutting the MEMs device. A heating element is electrically coupled to the one or more semiconductor devices and is separated from the hermetically sealed chamber by an out-gassing layer arranged along an interior surface of the hermetically sealed chamber. By operating the heating element to cause the out-gassing layer to release a gas, the pressure of the hermetically sealed chamber can be adjusted after it is formed.
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7.发明授权公开(公告)号：US11894250B2
公开(公告)日：2024-02-06
申请号：US16836639
申请日：2020-03-31
发明人： Chih-Yu Wang
CPC分类号： H01L21/67253 , G06T1/0014 , G06T7/0004 , H01J37/32944 , H01L21/67017 , H01L21/67288 , G06T2207/10016 , G06T2207/20081 , H01J2237/24507
摘要： A plasma discharge detection system detects undesirable plasma discharge events within a semiconductor process chamber. The plasma discharge detection system includes one or more cameras positioned around the semiconductor process chamber. The cameras capture images from within the semiconductor process chamber. The plasma discharge detection system includes a control system that receives the images from the cameras. The control system analyzes the images and detects plasma discharge within the semiconductor process chamber based on the images. The control system can adjust a semiconductor process in real time responsive to detecting the plasma discharge.
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公开(公告)号：US20230187216A1
公开(公告)日：2023-06-15
申请号：US18155554
申请日：2023-01-17
发明人： Chih-Yu Wang
IPC分类号： H01L21/308 , H01L29/78 , H01L21/8238 , H01L27/092 , H01L21/311
CPC分类号： H01L21/3086 , H01L21/3081 , H01L29/7853 , H01L21/823821 , H01L27/0924 , H01L21/31116
摘要： A method includes depositing a mask layer over a semiconductor substrate, etching the mask layer to form a patterned mask, wherein a sidewall of the patterned mask includes a first sidewall region, a second sidewall region, and a third sidewall region, wherein the first sidewall region is farther from the semiconductor substrate than the second sidewall region and the second sidewall region is farther from the semiconductor substrate than the third sidewall region, wherein the second sidewall region protrudes laterally from the first sidewall region and from the third sidewall region, etching the semiconductor substrate using the patterned mask to form fins, forming a gate stack over the fins, and forming source and drain regions in the fin adjacent the gate stack.
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公开(公告)号：US20180370790A1
公开(公告)日：2018-12-27
申请号：US16122180
申请日：2018-09-05
发明人： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Shiuan-Jeng Lin , Wei-Ding Wu , Ching-Hsiang Hu
摘要： The present disclosure, in some embodiments, relates to a method of forming a micro-electromechanical system (MEMS) package. The method includes forming one or more depressions within a capping substrate. A back-side of a MEMS substrate is bonded to the capping substrate after forming the one or more depressions, so that the one or more depressions define one or more cavities between the capping substrate and the MEMS substrate. A front-side of the MEMS substrate is selectively etched to form one or more trenches extending through the MEMS substrate, and one or more polysilicon vias are formed within the one or more trenches. A conductive bonding structure is formed on the front-side of the MEMS substrate at a location contacting the one or more polysilicon vias. The MEMS substrate is bonded to a CMOS substrate having one or more semiconductor devices by way of the conductive bonding structure.
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公开(公告)号：US10155656B2
公开(公告)日：2018-12-18
申请号：US14980297
申请日：2015-12-28
发明人： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Shiuan-Jeng Lin , Wei-Ding Wu , Ching-Hsiang Hu
摘要： The present disclosure relates to micro-electromechanical system (MEMS) package that uses polysilicon inter-tier connections to provide for a low parasitic capacitance in MEM device signals, and a method of formation. In some embodiments, the MEMS package has a CMOS substrate with one or more semiconductor devices arranged within a semiconductor body. A MEMS substrate having an ambulatory element is connected to the CMOS substrate by a conductive bonding structure. The conductive bonding structure is arranged on a front-side of the MEMS substrate at a location laterally offset from the ambulatory element. One or more polysilicon vias extend through the conductive MEMS substrate to the bonding structure. The one or more polysilicon vias are configured to electrically couple the MEMS substrate to the CMOS substrate. By connecting the MEMS substrate to the CMOS substrate using the polysilicon vias, the parasitic capacitance and form factor of the MEMS package are reduced.
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