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公开(公告)号:US20230307375A1
公开(公告)日:2023-09-28
申请号:US18151583
申请日:2023-01-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hao-Cheng Hou , Tsung-Ding Wang , Jung Wei Cheng , Yu-Min Liang , Chien-Hsun Lee , Shang-Yun Hou , Wei-Yu Chen , Collin Jordon Fleshman , Kuo-Lung Pan , Shu-Rong Chun , Sheng-Chi Lin
CPC classification number: H01L23/5385 , H01L23/3121 , H01L24/19 , H01L24/20 , H01L25/50 , H10B80/00 , H01L25/18 , H01L21/561 , H01L23/481 , H01L23/562 , H01L2224/16227 , H01L24/16 , H01L24/29 , H01L2224/2929 , H01L2924/0665 , H01L2224/29386 , H01L2924/05442 , H01L2924/05432 , H01L2924/0503 , H01L24/32 , H01L2224/32225 , H01L24/73 , H01L2224/73204 , H01L2224/19 , H01L2224/211
Abstract: A method includes forming a composite package substrate. The formation of the composite package substrate includes encapsulating an interconnect die in an encapsulant, with the interconnect die including a plurality of through-vias therein, and forming a first plurality of redistribution lines (RDLs) and a second plurality of RDLs on opposite sides of the interconnect die. The method further includes bonding an organic package substrate to the composite package substrate, and bonding a first package component and a second package component to the first plurality of RDLs. The first package component and the second package component are electrically interconnected through the interconnect die and the first plurality of RDLs.