公开(公告)号：US12057446B2

公开(公告)日：2024-08-06

申请号：US18359578

申请日：2023-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Hsing-Chih Lin

IPC: H01L21/00 ,  H01L21/265 ,  H01L23/00 ,  H01L23/522 ,  H01L27/06 ,  H01L29/66 ,  H01L29/861 ,  H01L49/02

CPC classification number: H01L27/0676 ,  H01L21/26513 ,  H01L23/5226 ,  H01L24/08 ,  H01L28/40 ,  H01L29/66136 ,  H01L29/861 ,  H01L2224/08145

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a first substrate, a capacitor within the first substrate, a diode structure within the first substrate adjacent the capacitor, and a first interconnect structure over the capacitor and the diode structure. A first conductive via of the first interconnect structure electrically couples the capacitor to the diode structure.

公开(公告)号：US11854959B2

公开(公告)日：2023-12-26

申请号：US17352969

申请日：2021-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng Kao ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Hsing-Chih Lin ,  Kuan-Hua Lin

IPC: H01L23/522 ,  H01L23/528 ,  H01L27/04 ,  H01L49/02

CPC classification number: H01L23/5223 ,  H01L28/87 ,  H01L28/91

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a first inter-metal dielectric (IMD) structure disposed over a semiconductor substrate. A metal-insulator-metal (MIM) device is disposed over the first IMD structure. The MIM device comprises at least three metal plates that are spaced from one another. The MIM device further comprises a plurality of capacitor insulator structures, where each of the plurality of capacitor insulator structures are disposed between and electrically isolate neighboring metal plates of the at least three metal plates.

公开(公告)号：US11177302B2

公开(公告)日：2021-11-16

申请号：US16219492

申请日：2018-12-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Nan Tu ,  Yu-Lung Yeh ,  Hsing-Chih Lin ,  Chien-Chang Huang ,  Shih-Shiung Chen

IPC: H01L27/146

Abstract: A semiconductor device includes a device layer, a semiconductor layer, a sensor element, a dielectric layer, a color filter layer, and a micro-lens. The semiconductor layer is over the device layer. The semiconductor layer has a plurality of microstructures thereon. Each of the microstructures has a substantially triangular cross-section. The sensor element is under the microstructures of the semiconductor layer and is configured to sense incident light. The dielectric layer is over the microstructures of the semiconductor layer. The color filter layer is over the dielectric layer. The micro-lens is over the color filter layer.

公开(公告)号：US11063038B2

公开(公告)日：2021-07-13

申请号：US16829176

申请日：2020-03-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kong-Beng Thei ,  Dun-Nian Yaung ,  Fu-Jier Fan ,  Hsing-Chih Lin ,  Hsiao-Chin Tuan ,  Jen-Cheng Liu ,  Alexander Kalnitsky ,  Yi-Sheng Chen

IPC: H01L23/00 ,  H01L27/06 ,  H01L23/48 ,  H01L23/522 ,  H01L23/31 ,  H01L21/48

Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a first IC die comprises a first bonding structure and a first interconnect structure over a first semiconductor substrate. A second IC die is disposed over the first IC die and comprises a second bonding structure and a second interconnect structure over a second semiconductor substrate. A seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate. A plurality of through silicon via (TSV) coupling structures is arranged in the peripheral region of the 3D IC along an inner perimeter of the seal-ring structure and closer to the 3D IC than the seal-ring structure. The plurality of TSV coupling structures respectively comprises a TSV disposed in the second semiconductor substrate and electrically coupling to the 3D IC through a stack of TSV wiring layers and inter-wire vias.

公开(公告)号：US11062977B2

公开(公告)日：2021-07-13

申请号：US16553222

申请日：2019-08-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Feng Kao ,  Dun-Nian Yaung ,  Hsing-Chih Lin ,  Jen-Cheng Liu ,  Wei-Tao Tsai

IPC: H01L23/552 ,  H01L23/48 ,  H01L25/065 ,  H01L21/762 ,  H01L25/00 ,  H01L27/02 ,  H01L21/3065 ,  H01L21/761 ,  H01L21/768 ,  H01L23/60 ,  H01L23/528 ,  H01L29/66 ,  H01L23/00 ,  H01L29/06 ,  H01L29/78 ,  H01L23/522

Abstract: Various embodiments of the present application are directed towards an integrated circuit (IC) in which a shield structure blocks the migration of charge to a semiconductor device from proximate a through substrate via (TSV). In some embodiments, the IC comprises a substrate, an interconnect structure, the semiconductor device, the TSV, and the shield structure. The interconnect structure is on a frontside of the substrate and comprises a wire. The semiconductor device is on the frontside of the substrate, between the substrate and the interconnect structure. The TSV extends completely through the substrate, from a backside of the substrate to the wire, and comprises metal. The shield structure comprises a PN junction extending completely through the substrate and directly between the semiconductor device and the TSV.

公开(公告)号：US20200243516A1

公开(公告)日：2020-07-30

申请号：US16829176

申请日：2020-03-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kong-Beng Thei ,  Dun-Nian Yaung ,  Fu-Jier Fan ,  Hsing-Chih Lin ,  Hsiao-Chin Tuan ,  Jen-Cheng Liu ,  Alexander Kalnitsky ,  Yi-Sheng Chen

IPC: H01L27/06 ,  H01L23/00 ,  H01L21/48 ,  H01L23/31 ,  H01L23/522 ,  H01L23/48

Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a first IC die comprises a first bonding structure and a first interconnect structure over a first semiconductor substrate. A second IC die is disposed over the first IC die and comprises a second bonding structure and a second interconnect structure over a second semiconductor substrate. A seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate. A plurality of through silicon via (TSV) coupling structures is arranged in the peripheral region of the 3D IC along an inner perimeter of the seal-ring structure and closer to the 3D IC than the seal-ring structure. The plurality of TSV coupling structures respectively comprises a TSV disposed in the second semiconductor substrate and electrically coupling to the 3D IC through a stack of TSV wiring layers and inter-wire vias.

公开(公告)号：US20200027789A1

公开(公告)日：2020-01-23

申请号：US16584809

申请日：2019-09-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Han Huang ,  Ching-Chun Wang ,  Dun-Nian Yaung ,  Hsing-Chih Lin ,  Jen-Cheng Liu ,  Min-Feng Kao

IPC: H01L21/822 ,  H01F17/00 ,  H01F41/04 ,  H01L21/768 ,  H01L23/00 ,  H01L27/08 ,  H01L49/02 ,  H01L23/522 ,  H01L25/065 ,  H01L27/06

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first plurality of conductive interconnect layers arranged within a first inter-level dielectric (ILD) structure disposed on a first surface of a first substrate. A second plurality of conductive interconnect layers are arranged within a second ILD structure disposed on a first surface of a second substrate. The second substrate is separated from the first substrate by the first ILD structure. The first plurality of conductive interconnect layers and the second plurality of conductive interconnect layers define an inductor having one or more turns.

公开(公告)号：US10164141B2

公开(公告)日：2018-12-25

申请号：US14332124

申请日：2014-07-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Nan Tu ,  Yu-Lung Yeh ,  Hsing-Chih Lin ,  Chien-Chang Huang

IPC: H01L21/00 ,  H01L21/76 ,  H01L31/18 ,  H01L31/101 ,  H01L27/146

Abstract: A semiconductor device includes a carrier wafer, a device layer, a first semiconductor layer and a second semiconductor layer. The device layer is disposed on the carrier wafer. The first semiconductor layer is disposed on the device layer, and has a first side face and a second side face opposite to the first side face, in which the first side face is adjacent to the device layer. The second semiconductor layer is disposed on the first semiconductor layer, and has a third side face and a fourth side face opposite to the third side face, in which the fourth side face of the second semiconductor layer is adjacent to the second side face of the first semiconductor layer, and the second semiconductor layer is implanted and annealed.

公开(公告)号：US10157946B2

公开(公告)日：2018-12-18

申请号：US15796693

申请日：2017-10-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Nan Tu ,  Yu-Lung Yeh ,  Hsing-Chih Lin ,  Chien-Chang Huang ,  Shih-Shiung Chen

IPC: H01L27/146

Abstract: A semiconductor device is operated for sensing incident light and includes a substrate, a device layer, a semiconductor layer and a color filter layer. The device layer is disposed on the substrate and includes light-sensing regions. The semiconductor layer overlies the device layer and has a first surface and a second surface opposite to the first surface. The first surface is adjacent to the device layer. The semiconductor layer includes microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer.

公开(公告)号：US09818779B2

公开(公告)日：2017-11-14

申请号：US14460051

申请日：2014-08-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Nan Tu ,  Yu-Lung Yeh ,  Hsing-Chih Lin ,  Chien-Chang Huang ,  Shih-Shiung Chen

IPC: H01L27/146

CPC classification number: H01L27/14625 ,  H01L27/14621 ,  H01L27/14645 ,  H01L27/14685 ,  H01L27/14689

Abstract: A semiconductor device is operated for sensing incident light and includes a substrate, a device layer, a semiconductor layer and a color filter layer. The device layer is disposed on the substrate and includes light-sensing regions. The semiconductor layer overlies the device layer and has a first surface and a second surface opposite to the first surface. The first surface is adjacent to the device layer. The semiconductor layer includes microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer.