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公开(公告)号:US20200051837A1
公开(公告)日:2020-02-13
申请号:US16656804
申请日:2019-10-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Su-Horng Lin , Tsung-Hsun Yu , Victor Y. Lu
IPC: H01L21/67 , H01L21/677
Abstract: The present disclosure relates to some embodiments of a method for improving processing efficiency of a cluster tool. The method comprises transferring a first lot of wafers from a transfer load lock to a designated storage load lock and transferring a second lot of wafers from the transfer load lock to the designated storage load lock while the first lot of wafers is in the transfer load lock or the designated storage load lock. The designated storage load lock has the same structure as the transfer load lock and respectively has an inner load lock portal at an interface with the first transfer chamber and an outer load lock portal on a sidewall of a front end interface. The inner load lock portal of the designated storage load lock is retained opened during processing. The outer load lock portal of the designated storage load lock is retained closed during processing.
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公开(公告)号:US20170352524A1
公开(公告)日:2017-12-07
申请号:US15170143
申请日:2016-06-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Wei Hung , Chia-Chiung Lo , Chien-Feng Lin , Tsung-Hsun Yu
IPC: H01J37/32 , H01L21/3065 , H01L21/67
CPC classification number: H01J37/32853 , H01J37/32357 , H01J37/32449 , H01J37/32834 , H01L21/3065 , H01L21/67017
Abstract: An apparatus for a semiconductor process includes an exhaust pipe coupled to a reaction chamber and a pump; a pressure control valve that is coupled to the exhaust pipe and configured to control a pressure value in the reaction chamber; a first pipe that is coupled to the exhaust pipe and etching gas source such that the first pipe is configured to provide an etching gas into the exhaust pipe; a second pipe that is coupled to the exhaust pipe and a radical generator such that the second pipe is configured to provide a radical into the exhaust pipe; and a third pipe that is coupled to the exhaust pipe and a diluted gas source such that the third pipe is configured to provide diluted gas into the exhaust pipe.
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公开(公告)号:US10510566B2
公开(公告)日:2019-12-17
申请号:US14798938
申请日:2015-07-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Su-Horng Lin , Tsung-Hsun Yu , Victor Y. Lu
Abstract: Some embodiments relate to a cluster tool for semiconductor manufacturing. The cluster tool comprises a first transfer chamber having a first transfer robot. The cluster tool further comprises a designated storage chamber and a transfer load lock attached to the first transfer chamber. The cluster tool further comprises a second transfer chamber connected to the first transfer chamber through a pair of via connector chambers, the second transfer chamber having a second transfer robot. The cluster tool further comprises at least three epitaxial deposition chamber attached to the second transfer chamber. The cluster tool further comprises a control unit configured to control the second transfer robot to transfer wafers between the designated storage chamber and the transfer load lock.
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公开(公告)号:US10109467B2
公开(公告)日:2018-10-23
申请号:US15170143
申请日:2016-06-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Wei Hung , Chia-Chiung Lo , Chien-Feng Lin , Tsung-Hsun Yu
IPC: C23C16/44 , H01J37/32 , H01L21/67 , H01L21/3065
Abstract: An apparatus for a semiconductor process includes an exhaust pipe coupled to a reaction chamber and a pump; a pressure control valve that is coupled to the exhaust pipe and configured to control a pressure value in the reaction chamber; a first pipe that is coupled to the exhaust pipe and etching gas source such that the first pipe is configured to provide an etching gas into the exhaust pipe; a second pipe that is coupled to the exhaust pipe and a radical generator such that the second pipe is configured to provide a radical into the exhaust pipe; and a third pipe that is coupled to the exhaust pipe and a diluted gas source such that the third pipe is configured to provide diluted gas into the exhaust pipe.
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公开(公告)号:US11441221B2
公开(公告)日:2022-09-13
申请号:US17018797
申请日:2020-09-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Hsien Cheng , Chung-Ting Ko , Tsung-Hsun Yu , Tze-Liang Lee , Chi On Chui
IPC: H01L21/02 , H01L21/033 , C23C16/455 , C23C16/40 , H01L21/8238
Abstract: In an embodiment, a method of manufacturing a semiconductor device includes preparing a deposition processing chamber by flowing first precursors to form a dielectric coat along an inner sidewall of the deposition processing chamber and flowing a second precursor to form a hydrophobic layer over the dielectric coat. In addition one or more deposition cycles are performed. Next, the second precursor is flowed again to repair the hydrophobic layer.
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公开(公告)号:US20210262090A1
公开(公告)日:2021-08-26
申请号:US17018797
申请日:2020-09-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Po-Hsien Cheng , Chung-Ting Ko , Tsung-Hsun Yu , Tze-Liang Lee , Chi On Chui
IPC: C23C16/455 , H01L21/033 , H01L21/02 , C23C16/40
Abstract: In an embodiment, a method of manufacturing a semiconductor device includes preparing a deposition processing chamber by flowing first precursors to form a dielectric coat along an inner sidewall of the deposition processing chamber and flowing a second precursor to form a hydrophobic layer over the dielectric coat. In addition one or more deposition cycles are performed. Next, the second precursor is flowed again to repair the hydrophobic layer.
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公开(公告)号:US10755953B2
公开(公告)日:2020-08-25
申请号:US16656804
申请日:2019-10-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Su-Horng Lin , Tsung-Hsun Yu , Victor Y. Lu
IPC: H01L21/67 , H01L21/677 , C30B25/02
Abstract: The present disclosure relates to some embodiments of a method for improving processing efficiency of a cluster tool. The method comprises transferring a first lot of wafers from a transfer load lock to a designated storage load lock and transferring a second lot of wafers from the transfer load lock to the designated storage load lock while the first lot of wafers is in the transfer load lock or the designated storage load lock. The designated storage load lock has the same structure as the transfer load lock and respectively has an inner load lock portal at an interface with the first transfer chamber and an outer load lock portal on a sidewall of a front end interface. The inner load lock portal of the designated storage load lock is retained opened during processing. The outer load lock portal of the designated storage load lock is retained closed during processing.
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