公开(公告)号：US20250006500A1

公开(公告)日：2025-01-02

申请号：US18762105

申请日：2024-07-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Lan Chang ,  Ting-Gang Chen ,  Tai-Chun Huang ,  Chi On Chui ,  Yung-Cheng Lu

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.

公开(公告)号：US20220367193A1

公开(公告)日：2022-11-17

申请号：US17874670

申请日：2022-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Lan Chang ,  Ting-Gang Chen ,  Tai-Chun Huang ,  Chi On Chui ,  Yung-Cheng Lu

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762

Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.

公开(公告)号：US20220020865A1

公开(公告)日：2022-01-20

申请号：US17198133

申请日：2021-03-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Ju Chen ,  Chung-Ting Ko ,  Ya-Lan Chang ,  Ting-Gang Chen ,  Tai-Chun Huang ,  Chi On Chui

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/78

Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

公开(公告)号：US11495464B2

公开(公告)日：2022-11-08

申请号：US16923658

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Lan Chang ,  Ting-Gang Chen ,  Tai-Chun Huang ,  Chi On Chui ,  Yung-Cheng Lu

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L21/28 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/06 ,  H01L29/08

Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.

公开(公告)号：US09660084B2

公开(公告)日：2017-05-23

申请号：US14851485

申请日：2015-09-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Po-Chi Wu ,  Chai-Wei Chang ,  Jung-Jui Li ,  Ya-Lan Chang ,  Yi-Cheng Chao

IPC: H01L21/02 ,  H01L21/30 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L29/0653 ,  H01L29/66545 ,  H01L29/66795

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.

公开(公告)号：US20240372000A1

公开(公告)日：2024-11-07

申请号：US18776388

申请日：2024-07-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Chi Wu ,  Chai-Wei Chang ,  Jung-Jui Li ,  Ya-Lan Chang ,  Yi-Cheng Chao

IPC: H01L29/78 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.

公开(公告)号：US12100765B2

公开(公告)日：2024-09-24

申请号：US18067970

申请日：2022-12-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Chi Wu ,  Chai-Wei Chang ,  Jung-Jui Li ,  Ya-Lan Chang ,  Yi-Cheng Chao

IPC: H01L29/78 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/823842 ,  H01L29/0653 ,  H01L29/66545 ,  H01L29/66795

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.

公开(公告)号：US12068162B2

公开(公告)日：2024-08-20

申请号：US17874670

申请日：2022-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Lan Chang ,  Ting-Gang Chen ,  Tai-Chun Huang ,  Chi On Chui ,  Yung-Cheng Lu

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/28123 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31053 ,  H01L21/76227 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.

公开(公告)号：US11855185B2

公开(公告)日：2023-12-26

申请号：US17198133

申请日：2021-03-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Ju Chen ,  Chung-Ting Ko ,  Ya-Lan Chang ,  Ting-Gang Chen ,  Tai-Chun Huang ,  Chi On Chui

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/78 ,  H01L21/02 ,  H01L21/033

CPC classification number: H01L29/66795 ,  H01L21/02178 ,  H01L21/0332 ,  H01L21/823431 ,  H01L29/0669 ,  H01L29/66636 ,  H01L29/785

Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

公开(公告)号：US20230395702A1

公开(公告)日：2023-12-07

申请号：US18364352

申请日：2023-08-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Ju Chen ,  Chung-Ting Ko ,  Ya-Lan Chang ,  Ting-Gang Chen ,  Tai-Chun Huang ,  Chi On Chui

IPC: H01L29/66 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/78 ,  H01L21/02 ,  H01L21/033

CPC classification number: H01L29/66795 ,  H01L21/823431 ,  H01L29/0669 ,  H01L29/785 ,  H01L21/02178 ,  H01L21/0332 ,  H01L29/66636

Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.