IMAGE SENSOR DEVICE
    1.
    发明申请

    公开(公告)号:US20220367549A1

    公开(公告)日:2022-11-17

    申请号:US17876878

    申请日:2022-07-29

    Abstract: An image sensor device includes a substrate, photosensitive pixels, an interconnect structure, a dielectric layer, and a light blocking element. The photosensitive pixels are in the substrate. The interconnect structure is over a first side of the substrate. The dielectric layer is over a second side of the substrate opposite the first side of the substrate. The light blocking element has a first portion extending over a top surface of the dielectric layer and a second portion extending in the dielectric layer. The second portion of the light blocking element laterally surrounds the photosensitive pixels.

    IMAGE SENSORS WITH STRESS ADJUSTING LAYERS

    公开(公告)号:US20210265399A1

    公开(公告)日:2021-08-26

    申请号:US16937306

    申请日:2020-07-23

    Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.

    METHOD OF FORMING SEMICONDUCTOR DEVICE WITH GATE

    公开(公告)号:US20200295188A1

    公开(公告)日:2020-09-17

    申请号:US16892458

    申请日:2020-06-04

    Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate. The method includes forming a gate over the semiconductor substrate. The method includes forming a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a top surface and a second portion of a first sidewall of the gate, the top surface faces away from the semiconductor substrate, the support film and a topmost surface of the active region do not overlap with each other, and the topmost surface faces the gate. The method includes after forming the support film, forming lightly doped regions in the semiconductor substrate and at two opposite sides of the gate.

    HEAT DISSIPATION STRUCTURES
    9.
    发明申请

    公开(公告)号:US20210082784A1

    公开(公告)日:2021-03-18

    申请号:US17107312

    申请日:2020-11-30

    Abstract: The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.

    IMAGE SENSOR AND METHOD OF FORMING THE SAME

    公开(公告)号:US20210020671A1

    公开(公告)日:2021-01-21

    申请号:US16512834

    申请日:2019-07-16

    Abstract: A back side illumination (BSI) image sensor is provided. The BSI image sensor includes a semiconductor substrate, a first dielectric layer, a reflective element, a second dielectric layer and a color filter layer. The semiconductor substrate has a front side and a back side. The first dielectric layer is disposed on the front side of the semiconductor substrate. The reflective element is disposed on the first dielectric layer, in which the reflective element has an inner sidewall contacting the first dielectric layer, and the inner sidewall has a zigzag profile. The second dielectric layer is disposed on the first dielectric layer and the reflective element. The color filter layer is disposed on the backside of the semiconductor substrate.

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