公开(公告)号：US20240120409A1

公开(公告)日：2024-04-11

申请号：US18525131

申请日：2023-11-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd. ,  National Taiwan University

发明人： Miin-Jang Chen ,  Kuen-Yu Tsai ,  Chee-Wee Liu

IPC分类号： H01L29/66 ,  H01L21/308

CPC分类号： H01L29/66795 ,  H01L21/3086 ,  H01L21/31144

摘要： A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

公开(公告)号：US09418049B2

公开(公告)日：2016-08-16

申请号：US13742881

申请日：2013-01-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd ,  National Taiwan University

发明人： Kuen-Yu Tsai ,  Chun-Hung Liu

IPC分类号： G03F7/20 ,  G06F17/18 ,  H01J37/00 ,  G03F1/70

CPC分类号： G06F17/18 ,  G03F1/70 ,  G03F7/70433 ,  G03F7/705 ,  H01J37/00 ,  H01J37/3174 ,  H01J2237/31761 ,  H01J2237/31762

摘要： A method for establishing a parametric model of a semiconductor process is provided. A first intermediate result is generated according to layout data and a non-parametric model of the semiconductor process. A first response is obtained according to the first intermediate result. A specific mathematical function is selected from a plurality of mathematical functions, and the parametric model is obtained according to the specific mathematical function. A second intermediate result is generated according to the layout data and the parametric model. A second response is obtained according to the second intermediate result. It is determined whether the parametric model is an optimal model according to the first and second responses.

摘要翻译： 提供了一种用于建立半导体工艺的参数模型的方法。 根据布局数据和半导体工艺的非参数模型生成第一中间结果。 根据第一中间结果获得第一响应。 从多个数学函数中选择具体的数学函数，并且根据具体的数学函数获得参数模型。 根据布局数据和参数模型生成第二个中间结果。 根据第二中间结果获得第二响应。 根据第一和第二响应确定参数模型是否是最优模型。

公开(公告)号：US20180248020A1

公开(公告)日：2018-08-30

申请号：US15962398

申请日：2018-04-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd. ,  National Taiwan University

发明人： Miin-Jang Chen ,  Kuen-Yu Tsai ,  Chee-Wee Liu

IPC分类号： H01L29/66 ,  H01L21/308

摘要： A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

公开(公告)号：US10665696B2

公开(公告)日：2020-05-26

申请号：US15962398

申请日：2018-04-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd. ,  National Taiwan University

发明人： Miin-Jang Chen ,  Kuen-Yu Tsai ,  Chee-Wee Liu

IPC分类号： H01L29/66 ,  H01L21/308 ,  H01L21/033

摘要： A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

公开(公告)号：US10007752B2

公开(公告)日：2018-06-26

申请号：US14804132

申请日：2015-07-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd. ,  National Taiwan University

发明人： Kuen-Yu Tsai ,  Meng-Fu You ,  Yi-Chang Lu

IPC分类号： G06F17/10 ,  G06F17/50

CPC分类号： G06F17/5081

摘要： The present disclosure relates to a curve-fitting procedure for determining proximity effect device parameters in semiconductor fabrication. Methods presented herein are adapted to determine the impact of narrow width related effects on device characteristics by comparing two-dimensional (2D) and/or three-dimensional (3D) device simulations. Methods presented herein are adapted to determine the accuracy of conventional extraction methods utilizing non-rectangular gate device simulation.

公开(公告)号：US20150340469A1

公开(公告)日：2015-11-26

申请号：US14285281

申请日：2014-05-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd. ,  National Taiwan University

发明人： Miin-Jang Chen ,  Kuen-Yu Tsai ,  Chee-Wee Liu

IPC分类号： H01L29/66 ,  H01L21/308

CPC分类号： H01L29/66795 ,  H01L21/3086

摘要： A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

摘要翻译： 提供一种形成半导体器件的方法。 第一图案化掩模形成在衬底上，第一图案化掩模在其中具有第一开口。 在第一开口中的基板上形成第二图案化掩模，第一图案化掩模和第二图案掩模形成组合图案掩模。 组合的图案化掩模形成为具有一个或多个第二开口，其中衬底的一个或多个未屏蔽部分被暴露。 在一个或多个第二开口中的衬底中形成对应于衬底的一个或多个未屏蔽部分的沟槽。

公开(公告)号：US20150212427A1

公开(公告)日：2015-07-30

申请号：US14448274

申请日：2014-07-31

申请人： National Taiwan University

发明人： Jia-Han Li ,  Yen-Min Lee ,  Kuen-Yu Tsai

IPC分类号： G03F7/20 ,  G02B5/08

CPC分类号： G03F7/70316 ,  G02B5/0875 ,  G02B5/0891 ,  G03F7/70958 ,  G21K1/062

摘要： A multilayer mirror structure for reflecting extreme ultraviolet (EUV) light is provided. The multilayer mirror structure includes a substrate and a plurality of first material layers and a plurality of second material layers alternately stacked on the substrate. Each of the first material layers has a plurality of low loss regions defined thereon. Each of the low loss regions has a low loss member for reducing the loss of the EUV light when the low loss regions are irradiated with the EUV light, thereby enhancing the reflectivity of the first material layers.

摘要翻译： 提供了用于反射极紫外（EUV）光的多层反射镜结构。 多层反射镜结构包括基板和交替层叠在基板上的多个第一材料层和多个第二材料层。 每个第一材料层具有限定在其上的多个低损耗区域。 每个低损耗区域具有低损耗部件，用于当用EUV光照射低损耗区域时减少EUV光的损失，从而提高第一材料层的反射率。

公开(公告)号：US09972702B2

公开(公告)日：2018-05-15

申请号：US14285281

申请日：2014-05-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd. ,  National Taiwan University

发明人： Miin-Jang Chen ,  Kuen-Yu Tsai ,  Chee-Wee Liu

IPC分类号： H01L23/58 ,  H01L29/66 ,  H01L21/308

CPC分类号： H01L29/66795 ,  H01L21/3086

摘要： A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

公开(公告)号：US11855190B2

公开(公告)日：2023-12-26

申请号：US18065234

申请日：2022-12-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd. ,  National Taiwan University

发明人： Miin-Jang Chen ,  Kuen-Yu Tsai ,  Chee-Wee Liu

IPC分类号： H01L29/66 ,  H01L21/308 ,  H01L21/033 ,  H01L21/28 ,  H01L21/311

CPC分类号： H01L29/66795 ,  H01L21/3086 ,  H01L21/0337 ,  H01L21/28132 ,  H01L21/308 ,  H01L21/31144

摘要： A method for forming a semiconductor device is provided. A first patterned mask is formed on the substrate, the first patterned mask having a first opening therein. A second patterned mask is formed on the substrate in the first opening, the first patterned mask and the second patterned mask forming a combined patterned mask. The combined patterned mask is formed having one or more second openings, wherein one or more unmasked portions of the substrate are exposed. Trenches that correspond to the one or more unmasked portions of the substrate are formed in the substrate in the one or more second openings.

公开(公告)号：US20150348775A1

公开(公告)日：2015-12-03

申请号：US14290742

申请日：2014-05-29

申请人： National Taiwan University ,  Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuen-Yu Tsai ,  Miin-Jang Chen ,  Si-Chen Lee

IPC分类号： H01L21/027 ,  G03F7/20 ,  H01L21/033

CPC分类号： H01L21/0274 ,  G03F7/2037 ,  G03F7/2039 ,  G03F7/2045 ,  H01L21/0278 ,  H01L21/0279 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/31111

摘要： A process for fabricating an integrated circuit is provided. The process includes providing a substrate and forming a hard mask on the substrate. The hard mask may be formed by atomic-layer deposition (ALD) or molecular-layer deposition (MLD). The process also includes disposing an exposure mask over the hard mask and exposing the exposure mask to a patterning particle to pattern a gap in the hard mask. The patterning particle may be, for example, a photon or a charged particle.

摘要翻译： 提供一种用于制造集成电路的工艺。 该方法包括提供衬底并在衬底上形成硬掩模。 硬掩模可以通过原子层沉积（ALD）或分子层沉积（MLD）形成。 该方法还包括在硬掩模上设置曝光掩模，并将曝光掩模暴露于图案化颗粒以对硬掩模进行图案化。 图案化颗粒可以是例如光子或带电粒子。