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17 条记录 (耗时 0.024 秒)

    Integrated capacitor
    2.
    发明授权
    Integrated capacitor 有权
    集成电容

    公开(公告)号：US09472612B2

    公开(公告)日：2016-10-18

    申请号：US15071014

    申请日：2016-03-15

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Chin-Wei Kuo ,  Cheng-Wei Luo ,  Hsiao-Tsung Yen ,  Jun-Cheng Huang ,  Min-Chie Jeng

    IPC分类号： H01L49/02

    CPC分类号： H01L28/87 ,  H01L23/5223 ,  H01L28/86 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method includes forming first, second, and third conductive leaf structures. The first conductive leaf structure includes a first conductive midrib and conductive veins. The second conductive leaf structure is electrically connected to the first conductive leaf structure, and includes a second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending away from the first conductive midrib. The third conductive leaf structure includes a third conductive midrib between the first conductive midrib and the second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending toward the second conductive midrib.

    摘要翻译： 一种方法包括形成第一，第二和第三导电叶结构。 第一导电叶结构包括第一导电中脉和导电静脉。 第二导电叶结构电连接到第一导电叶结构，并且包括第二导电中脉，朝向第一导电中脉延伸的导电静脉和远离第一导电中脉延伸的导电静脉。 第三导电叶结构包括在第一导电中脉和第二导电中脉之间的第三导电中脉，朝向第一导电中脉延伸的导电静脉和朝向第二导电中脉延伸的导电静脉。

    Integrated capacitor
    3.
    发明授权
    Integrated capacitor 有权
    集成电容

    公开(公告)号：US09331013B2

    公开(公告)日：2016-05-03

    申请号：US13902575

    申请日：2013-05-24

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Hsiao-Tsung Yen ,  Cheng-Wei Luo ,  Jun-Cheng Huang ,  Chin-Wei Kuo ,  Min-Chie Jeng

    IPC分类号： H01L49/02 ,  H01L23/522

    CPC分类号： H01L28/87 ,  H01L23/5223 ,  H01L28/86 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure includes first, second, and third conductive leaf structures. The first conductive leaf structure includes a first conductive midrib and conductive veins. The second conductive leaf structure is electrically connected to the first conductive leaf structure, and includes a second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending away from the first conductive midrib. The third conductive leaf structure includes a third conductive midrib between the first conductive midrib and the second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending toward the second conductive midrib.

    摘要翻译： 一种结构包括第一，第二和第三导电叶结构。 第一导电叶结构包括第一导电中脉和导电静脉。 第二导电叶结构电连接到第一导电叶结构，并且包括第二导电中脉，朝向第一导电中脉延伸的导电静脉和远离第一导电中脉延伸的导电静脉。 第三导电叶结构包括在第一导电中脉和第二导电中脉之间的第三导电中脉，朝向第一导电中脉延伸的导电静脉和朝向第二导电中脉延伸的导电静脉。

    Inductor With Magnetic Material
    4.
    发明申请
    Inductor With Magnetic Material 审中-公开
    带磁性材料的电感器

    公开(公告)号：US20150255391A1

    公开(公告)日：2015-09-10

    申请号：US14720805

    申请日：2015-05-24

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Cheng-Wei Luo ,  Hsiao-Tsung Yen ,  Chin-Wei Kuo ,  Min-Chie Jeng

    IPC分类号： H01L23/522 ,  H01L49/02

    CPC分类号： H01L23/5227 ,  H01F17/0033 ,  H01F2017/0066 ,  H01F2017/0086 ,  H01F2027/2809 ,  H01L21/486 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5384 ,  H01L28/10 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00

    摘要： In accordance with an embodiment, a semiconductor device comprises a semiconductor die, an interposer, and conductive bumps bonding the semiconductor die to the interposer. The semiconductor die comprises a first metallization layer, and the first metallization layer comprises a first conductive pattern. The interposer comprises a second metallization layer, and the second metallization layer comprises a second conductive pattern. Some of the conductive bumps electrically couple the first conductive pattern to the second conductive pattern to form a coil. A magnetic layer is positioned within the coil. In another embodiment, a coil is formed on a single substrate, wherein a magnetic layer is positioned within the coil. Other embodiments contemplate other configurations of coils, inductors, and/or transformers, and contemplate methods of manufacture.

    摘要翻译： 根据实施例，半导体器件包括半导体管芯，插入件和将半导体管芯接合到插入件的导电凸块。 半导体管芯包括第一金属化层，第一金属化层包括第一导电图案。 插入器包括第二金属化层，并且第二金属化层包括第二导电图案。 一些导电凸块将第一导电图案电耦合到第二导电图案以形成线圈。 磁性层位于线圈内。 在另一个实施例中，线圈形成在单个基板上，其中磁性层位于线圈内。 其他实施例考虑了线圈，电感器和/或变压器的其他配置，并考虑了制造方法。

    Integrated Capacitor
    5.
    发明申请
    Integrated Capacitor 有权
    集成电容器

    公开(公告)号：US20140264742A1

    公开(公告)日：2014-09-18

    申请号：US13902575

    申请日：2013-05-24

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Hsiao-Tsung Yen ,  Cheng-Wei Luo ,  Jun-Cheng Huang ,  Chin-Wei Kuo ,  Min-Chie Jeng

    IPC分类号： H01L49/02

    CPC分类号： H01L28/87 ,  H01L23/5223 ,  H01L28/86 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A structure includes first, second, and third conductive leaf structures. The first conductive leaf structure includes a first conductive midrib and conductive veins. The second conductive leaf structure is electrically connected to the first conductive leaf structure, and includes a second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending away from the first conductive midrib. The third conductive leaf structure includes a third conductive midrib between the first conductive midrib and the second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending toward the second conductive midrib.

    摘要翻译： 一种结构包括第一，第二和第三导电叶结构。 第一导电叶结构包括第一导电中脉和导电静脉。 第二导电叶结构电连接到第一导电叶结构，并且包括第二导电中脉，朝向第一导电中脉延伸的导电静脉和远离第一导电中脉延伸的导电静脉。 第三导电叶结构包括在第一导电中脉和第二导电中脉之间的第三导电中脉，朝向第一导电中脉延伸的导电静脉和朝向第二导电中脉延伸的导电静脉。

    Method of making slow wave inductive structure
    6.
    发明授权
    Method of making slow wave inductive structure 有权

    公开(公告)号：US11929196B2

    公开(公告)日：2024-03-12

    申请号：US17395122

    申请日：2021-08-05

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Hsiao-Tsung Yen ,  Cheng-Wei Luo

    IPC分类号： H01F21/12

    CPC分类号： H01F21/12 ,  H01F2021/125

    摘要： A method of making a slow wave inductive structure includes depositing a first dielectric layer over a first substrate. The method further includes forming a first conductive winding in the first dielectric layer. The method further includes bonding a second substrate to the first dielectric layer, wherein the second substrate is physically separated from the first conductive winding, and the second substrate has a thickness ranging from about 50 nanometers (nm) to about 150 nm. The method further includes depositing a second dielectric layer over the second substrate. The method further includes forming a second conductive winding in the second dielectric layer, wherein the second substrate is physically separated from the second conductive winding.

    Method of making slow wave inductive structure
    7.
    发明授权
    Method of making slow wave inductive structure 有权

    公开(公告)号：US11101061B2

    公开(公告)日：2021-08-24

    申请号：US16048030

    申请日：2018-07-27

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

    发明人： Hsiao-Tsung Yen ,  Cheng-Wei Luo

    IPC分类号： H01F21/12

    摘要： A method of making a slow wave inductive structure includes forming a first conductive winding over a first substrate. The method further includes bonding a second substrate to the first substrate, wherein the second substrate has a thickness ranging from about 50 nanometers (nm) to about 150 nm, wherein a distance between the first conductive winding and the second substrate ranges from about 1 micron (μm) to about 2 μm.