公开(公告)号：US20220336309A1

公开(公告)日：2022-10-20

申请号：US17857166

申请日：2022-07-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sung-Hui Huang ,  Shang-Yun Hou ,  Tien-Yu Huang ,  Heh-Chang Huang ,  Kuan-Yu Huang ,  Shu-Chia Hsu ,  Yu-Shun Lin

IPC分类号： H01L23/31 ,  H01L25/16

摘要： A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.

公开(公告)号：US11101260B2

公开(公告)日：2021-08-24

申请号：US16051848

申请日：2018-08-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shang-Yun Hou ,  Sung-Hui Huang ,  Kuan-Yu Huang ,  Hsien-Pin Hu ,  Yushun Lin ,  Heh-Chang Huang ,  Hsing-Kuo Hsia ,  Chih-Chieh Hung ,  Ying-Ching Shih ,  Chin-Fu Kao ,  Wen-Hsin Wei ,  Li-Chung Kuo ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L23/24 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L25/18 ,  H01L23/00

摘要： An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

公开(公告)号：US11804445B2

公开(公告)日：2023-10-31

申请号：US17244754

申请日：2021-04-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Heh-Chang Huang ,  Fu-Jen Li ,  Pei-Haw Tsao ,  Shyue-Ter Leu

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/214

摘要： A chip package structure is provided. The chip package structure includes a first chip structure including a substrate and an interconnect layer over the substrate. The chip package structure includes a second chip structure over the interconnect layer. The chip package structure includes a first conductive bump connected between the interconnect layer and the second chip structure. The chip package structure includes a conductive pillar over the interconnect layer. The chip package structure includes a molding layer over the interconnect layer and surrounding the second chip structure, the first conductive bump, and the conductive pillar. The chip package structure includes a second conductive bump over a first surface of the conductive pillar. The first surface faces away from the first chip structure.

公开(公告)号：US11978729B2

公开(公告)日：2024-05-07

申请号：US17370282

申请日：2021-07-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Heh-Chang Huang ,  Fu-Jen Li ,  Pei-Haw Tsao ,  Shyue-Ter Leu

IPC分类号： H01L25/16 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00

CPC分类号： H01L25/16 ,  H01L21/563 ,  H01L23/3135 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203

摘要： A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a package substrate having a first surface and a second surface opposite to the first surface. Several integrated devices are bonded to the first surface of the package substrate. A first underfill element is disposed over the first surface and surrounds the integrated devices. A first molding layer is disposed over the first surface and surrounds the integrated devices and the first underfill element. A semiconductor die is bonded to the second surface of the package substrate. A second underfill element is disposed over the second surface and surrounds the semiconductor die. A second molding layer is disposed over the second surface and surrounds the semiconductor die and the second underfill element. Several conductive bumps are disposed over the second surface and adjacent to the second molding layer.

公开(公告)号：US11764123B2

公开(公告)日：2023-09-19

申请号：US17857166

申请日：2022-07-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sung-Hui Huang ,  Shang-Yun Hou ,  Tien-Yu Huang ,  Heh-Chang Huang ,  Kuan-Yu Huang ,  Shu-Chia Hsu ,  Yu-Shun Lin

IPC分类号： H01L23/31 ,  H01L25/16

CPC分类号： H01L23/3185 ,  H01L25/167

摘要： A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.

公开(公告)号：US20190237454A1

公开(公告)日：2019-08-01

申请号：US16051848

申请日：2018-08-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shang-Yun Hou ,  Sung-Hui Huang ,  Kuan-Yu Huang ,  Hsien-Pin Hu ,  Yushun Lin ,  Heh-Chang Huang ,  Hsing-Kuo Hsia ,  Chih-Chieh Hung ,  Ying-Ching Shih ,  Chin-Fu Kao ,  Wen-Hsin Wei ,  Li-Chung Kuo ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L23/24 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48

CPC分类号： H01L25/50 ,  H01L21/4803 ,  H01L21/4853 ,  H01L23/24 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/16 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/16235

摘要： An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.