公开(公告)号：US11854819B2

公开(公告)日：2023-12-26

申请号：US17814283

申请日：2022-07-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Hao Fu ,  Hung-Ju Chou ,  Che-Lun Chang ,  Jiun-Ming Kuo ,  Yuan-Ching Peng ,  Sung-En Lin ,  Nung-Che Cheng ,  Chunyao Wang

IPC分类号： H01L21/308 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/06

CPC分类号： H01L21/3085 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/3081 ,  H01L21/3086 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66636 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696

摘要： The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.

公开(公告)号：US11757018B2

公开(公告)日：2023-09-12

申请号：US17332730

申请日：2021-05-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Te-An Yu ,  Hung-Ju Chou ,  Jet-Rung Chang ,  Yen-Po Lin ,  Jiun-Ming Kuo

IPC分类号： H01L21/22 ,  H01L29/66 ,  H01L21/223 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC分类号： H01L29/6653 ,  H01L21/223 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66742 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02576 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/78696

摘要： A method for forming a semiconductor device structure is provided. The method includes forming an n-type doped region in a semiconductor substrate and forming a semiconductor stack over the semiconductor substrate. The semiconductor stack has multiple sacrificial layers and multiple semiconductor layers laid out alternately. The method also includes introducing n-type dopants from the n-type doped region into the semiconductor stack during the forming of the semiconductor stack. The method further includes patterning the semiconductor stack to form a fin structure and forming a dummy gate stack to wrap around a portion of the fin structure. In addition, the method includes removing the dummy gate stack and the sacrificial layers to release multiple semiconductor nanostructures made up of remaining portions of the semiconductor layers. The method includes forming a metal gate stack to wrap around the semiconductor nanostructures.

公开(公告)号：US20220102151A1

公开(公告)日：2022-03-31

申请号：US17038258

申请日：2020-09-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Hao Fu ,  Hung-Ju Chou ,  Che-Lun Chang ,  Jiun-Ming Kuo ,  Yuan-Ching Peng ,  Sung-En Lin ,  Nung-Che Cheng ,  Chunyao Wang

IPC分类号： H01L21/308 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

摘要： The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.

公开(公告)号：US20240363725A1

公开(公告)日：2024-10-31

申请号：US18309125

申请日：2023-04-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Ling Hsieh ,  Hung-Ju Chou ,  Yu-Shan Lu ,  Wei-Yang Lee ,  Chih-Chung Chang ,  Yao-Hsuan Lai

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775

CPC分类号： H01L29/66439 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/775

摘要： Semiconductor devices and methods are provided. An exemplary method according to the present disclosure includes forming a semiconductor fin over a substrate, forming an integral dielectric layer over the substrate, wherein the dielectric layer includes a first portion extending along a sidewall surface of the semiconductor fin and a second portion disposed over the semiconductor fin, a thickness of the second portion of the dielectric layer is greater than a thickness of the first portion of the dielectric layer, forming a dummy gate electrode layer over the substrate, patterning the dielectric layer and the dummy gate electrode layer to form a dummy gate structure over a channel region of the semiconductor fin, forming source/drain features coupled to the channel region of the semiconductor fin and adjacent to the dummy gate structure, and replacing the dummy gate structure with a gate stack.

公开(公告)号：US11923250B2

公开(公告)日：2024-03-05

申请号：US17875466

申请日：2022-07-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Hung-Ju Chou ,  Chih-Chung Chang ,  Jiun-Ming Kuo ,  Che-Yuan Hsu ,  Pei-Ling Gao ,  Chen-Hsuan Liao

IPC分类号： H01L21/8238 ,  H01L21/02 ,  H01L21/3065 ,  H01L27/092 ,  H01L29/04 ,  H01L29/06 ,  H01L29/10 ,  H01L29/161

CPC分类号： H01L21/823807 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/3065 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0924 ,  H01L27/0928 ,  H01L29/045 ,  H01L29/0653 ,  H01L29/1054 ,  H01L29/1083 ,  H01L29/161

摘要： The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

公开(公告)号：US20200006077A1

公开(公告)日：2020-01-02

申请号：US16569815

申请日：2019-09-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yin Wang ,  Hung-Ju Chou ,  Jiun-Ming Kuo ,  Wei-Ken Lin ,  Chun Te Li

IPC分类号： H01L21/3105 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/06

摘要： A method includes forming a semiconductor capping layer over a first fin in a first region of a substrate, forming a dielectric layer over the semiconductor capping layer, and forming an insulation material over the dielectric layer, an upper surface of the insulation material extending further away from the substrate than an upper surface of the first fin. The method further includes recessing the insulation material to expose a top portion of the first fin, and forming a gate structure over the top portion of the first fin.

公开(公告)号：US20230197820A1

公开(公告)日：2023-06-22

申请号：US17834564

申请日：2022-06-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Min Jiao ,  Ji-Yin Tsai ,  Da-Wen Lin ,  Hung-Ju Chou

IPC分类号： H01L29/423 ,  H01L21/8234 ,  H01L29/66

CPC分类号： H01L29/42392 ,  H01L21/823418 ,  H01L21/823481 ,  H01L29/66545

摘要： The present disclosure provide a method that includes receiving a substrate having a semiconductor surface of a first semiconductor material; forming an APT feature in the substrate; performing a prebaking process to the substrate with a first temperature T1; epitaxially growing an undoped semiconductor layer of the first semiconductor layer and a first thickness t1 on the substrate at a second temperature T2; epitaxially growing a semiconductor layer stack over the undoped semiconductor layer at a third temperature T3 less than T2, wherein the semiconductor layer stack includes first semiconductor layers and second semiconductor layers stacked vertically in an alternating configuration; patterning the semiconductor substrate, and the semiconductor layer stack to form a trench, thereby defining an active region being adjacent the trench; forming an isolation feature in the trench; selectively removing the second semiconductor layers; and forming a gate structure wrapping around each of the first semiconductor layers.

公开(公告)号：US10964548B2

公开(公告)日：2021-03-30

申请号：US16569815

申请日：2019-09-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yin Wang ,  Hung-Ju Chou ,  Jiun-Ming Kuo ,  Wei-Ken Lin ,  Chun Te Li

IPC分类号： H01L21/3105 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L21/762 ,  H01L29/08

摘要： A method includes forming a semiconductor capping layer over a first fin in a first region of a substrate, forming a dielectric layer over the semiconductor capping layer, and forming an insulation material over the dielectric layer, an upper surface of the insulation material extending further away from the substrate than an upper surface of the first fin. The method further includes recessing the insulation material to expose a top portion of the first fin, and forming a gate structure over the top portion of the first fin.

公开(公告)号：US20220375756A1

公开(公告)日：2022-11-24

申请号：US17814283

申请日：2022-07-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Hao Fu ,  Hung-Ju Chou ,  Che-Lun Chang ,  Jiun-Ming Kuo ,  Yuan-Ching Peng ,  Sung-En Lin ,  Nung-Che Cheng ,  Chunyao Wang

IPC分类号： H01L21/308 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/06

摘要： The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.

公开(公告)号：US11437245B2

公开(公告)日：2022-09-06

申请号：US17038258

申请日：2020-09-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Hao Fu ,  Hung-Ju Chou ,  Che-Lun Chang ,  Jiun-Ming Kuo ,  Yuan-Ching Peng ,  Sung-En Lin ,  Nung-Che Cheng ,  Chunyao Wang

IPC分类号： H01L21/308 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/06

摘要： The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.