公开(公告)号：US20240178120A1

公开(公告)日：2024-05-30

申请号：US18166450

申请日：2023-02-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Ming Weng ,  Tzu-Sung Huang ,  Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Ming-Hung Tseng ,  Tsung-Hsien Chiang ,  Yen-Liang Lin ,  Chu-Chun Chueh

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/544 ,  H01L25/16

CPC分类号： H01L23/49838 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L25/16 ,  H01L23/49822 ,  H01L2223/54433 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82005 ,  H01L2224/82106 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/92244 ,  H01L2924/19106

摘要： An integrated fan-out package includes a first redistribution structure, a die, conductive structures, an encapsulant, and a second redistribution structure. The first redistribution structure has first regions and a second region surrounding the first regions. A metal density in the first regions is smaller than a metal density in the second region. The die is disposed over the first redistribution structure. The conductive structures are disposed on the first redistribution structure to surround the die. Vertical projections of the conductive structures onto the first redistribution structure fall within the first regions of the first redistribution structure. The encapsulant encapsulates the die and the conductive structures. The second redistribution structure is disposed on the encapsulant, the die, and the conductive structures.

公开(公告)号：US20230378098A1

公开(公告)日：2023-11-23

申请号：US18362989

申请日：2023-08-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Shih-Wei Chen

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/40 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/96 ,  H01L21/6835 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L25/50 ,  H01L23/4006 ,  H01L25/0655 ,  H01L2924/3511 ,  H01L2221/68372 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4087 ,  H01L2224/95001

摘要： A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.

公开(公告)号：US11646296B2

公开(公告)日：2023-05-09

申请号：US17315381

申请日：2021-05-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hung-Yi Kuo ,  Hao-Yi Tsai ,  Kuo-Lung Pan ,  Ting Hao Kuo ,  Yu-Chia Lai ,  Mao-Yen Chang ,  Po-Yuan Teng ,  Shu-Rong Chun

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L24/02 ,  H01L24/13 ,  H01L24/14 ,  H01L24/24 ,  H01L24/25 ,  H01L24/32 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/13024 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/14134 ,  H01L2224/24147 ,  H01L2224/25171 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2225/06527 ,  H01L2225/06562

摘要： A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.

公开(公告)号：US11824017B2

公开(公告)日：2023-11-21

申请号：US17981470

申请日：2022-11-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Shih-Wei Chen

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/40 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/4006 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/50 ,  H01L2023/405 ,  H01L2023/4031 ,  H01L2023/4087 ,  H01L2221/68372 ,  H01L2224/95001 ,  H01L2924/3511

摘要： A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.

公开(公告)号：US20220285289A1

公开(公告)日：2022-09-08

申请号：US17192897

申请日：2021-03-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Shih-Wei Chen

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/40

摘要： A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.

公开(公告)号：US20230223382A1

公开(公告)日：2023-07-13

申请号：US18185358

申请日：2023-03-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hung-Yi Kuo ,  Hao-Yi Tsai ,  Kuo-Lung Pan ,  Ting Hao Kuo ,  Yu-Chia Lai ,  Mao-Yen Chang ,  Po-Yuan Teng ,  Shu-Rong Chun

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/5383 ,  H01L24/16 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L24/32 ,  H01L2224/73253 ,  H01L24/73 ,  H01L2224/73203

摘要： A semiconductor package includes a lower semiconductor device, a plurality of conductive pillars, an upper semiconductor device, an encapsulating material, and a redistribution structure. The plurality of conductive pillars are disposed on the lower semiconductor device along a direction parallel to a side of the lower semiconductor device. The upper semiconductor device is disposed on the lower semiconductor device and reveals a portion of the lower semiconductor device where the plurality of conductive pillars are disposed, wherein the plurality of conductive pillars disposed by the same side of the upper semiconductor device and the upper semiconductor device comprises a cantilever part cantilevered over the at least one lower semiconductor device. The encapsulating material encapsulates the lower semiconductor device, the plurality of conductive pillars, and the upper semiconductor device. The redistribution structure is disposed over the upper semiconductor device and the encapsulating material.

公开(公告)号：US20220415737A1

公开(公告)日：2022-12-29

申请号：US17358001

申请日：2021-06-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Chieh Wu ,  Ting Hao Kuo ,  Kuo-Lung Pan ,  Po-Yuan Teng ,  Yu-Chia Lai ,  Shu-Rong Chun ,  Mao-Yen Chang ,  Wei-Kang Hsieh ,  Pavithra Sriram ,  Hao-Yi Tsai ,  Po-Han Wang ,  Yu-Hsiang Hu ,  Hung-Jui Kuo

IPC分类号： H01L23/31 ,  H01L23/538 ,  H01L23/29 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48

摘要： A semiconductor device includes semiconductor dies and a redistribution structure. The semiconductor dies are encapsulated in an encapsulant. The redistribution structure extends on the encapsulant and electrically connects the semiconductor dies. The redistribution structure includes dielectric layers and redistribution conductive layers alternately stacked. An outermost dielectric layer of the dielectric layers further away from the semiconductor dies is made of a first material. A first dielectric layer of the dielectric layers on which the outermost dielectric layer extends is made of a second material different from the first material. The first material includes at least one material selected from the group consisting of an epoxy resin, a phenolic resin, a polybenzooxazole, and a polyimide having a curing temperature lower than 250° C.

公开(公告)号：US12125804B2

公开(公告)日：2024-10-22

申请号：US18362989

申请日：2023-08-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Shih-Wei Chen

IPC分类号： H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/40 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/4006 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/50 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4087 ,  H01L2221/68372 ,  H01L2224/95001 ,  H01L2924/3511

摘要： A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.

公开(公告)号：US20230066410A1

公开(公告)日：2023-03-02

申请号：US17981470

申请日：2022-11-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Shih-Wei Chen

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/40 ,  H01L25/065

摘要： A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.

公开(公告)号：US11515268B2

公开(公告)日：2022-11-29

申请号：US17192897

申请日：2021-03-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Shih-Wei Chen

IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/40 ,  H01L25/065

摘要： A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.