公开(公告)号：US12046573B2

公开(公告)日：2024-07-23

申请号：US17697708

申请日：2022-03-17

申请人： SK hynix Inc.

发明人： Jin Woong Kim ,  Mi Seon Lee

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L24/30 ,  H01L24/04 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0652 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05025 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05186 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/13014 ,  H01L2224/13025 ,  H01L2224/13147 ,  H01L2224/14134 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/2746 ,  H01L2224/29012 ,  H01L2224/29035 ,  H01L2224/29147 ,  H01L2224/29186 ,  H01L2224/3003 ,  H01L2224/30051 ,  H01L2224/3015 ,  H01L2224/30181 ,  H01L2224/30505 ,  H01L2224/30517 ,  H01L2224/30519 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73153 ,  H01L2224/81201 ,  H01L2224/83048 ,  H01L2224/83201 ,  H01L2924/04941 ,  H01L2924/05042

摘要： A semiconductor die stack includes a base die and core dies stacked over the base die. Each of the base die and the core dies include a semiconductor substrate, a front side passivation layer formed over a front side of the semiconductor substrate, a back side passivation layer over a back side of the semiconductor substrate, a through-via vertically penetrating the semiconductor substrate and the front side passivation layer, and a bump, a support pattern, and a bonding insulating layer formed over the front side passivation layer. Top surfaces of the bump, the support pattern, and the bonding insulating layer are co-planar. The bump is vertically aligned with the through-via. The support pattern is spaced apart from the through-via and the bump. The support pattern includes a plurality of first bars that extend in parallel with each other in a first direction and a plurality of second bars that extend in parallel with each other in a second direction.

公开(公告)号：USRE49987E1

公开(公告)日：2024-05-28

申请号：US17725442

申请日：2022-04-20

申请人： Invensas LLC

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC分类号： H01L25/065 ,  B81B7/00 ,  B81C1/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/42 ,  H01L23/48 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L25/00 ,  H01L25/16 ,  H01L49/02

CPC分类号： H01L25/0657 ,  B81B7/0074 ,  B81C1/0023 ,  H01L21/4853 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/522 ,  H01L23/5383 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/24 ,  H01L24/49 ,  H01L24/73 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L24/02 ,  H01L24/17 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/0239 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/13616 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/14134 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2224/24147 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48149 ,  H01L2224/4903 ,  H01L2224/73201 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/3841 ,  H01L2924/01322 ,  H01L2924/00 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2224/0239 ,  H01L2924/01029 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/05568 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/81825 ,  H01L2924/00014 ,  H01L2224/1147 ,  H01L2924/00014 ,  H01L2224/0347 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05111 ,  H01L2924/00014 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/05169 ,  H01L2924/00014 ,  H01L2224/05669 ,  H01L2924/00014 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2924/00014 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/0345 ,  H01L2924/00014 ,  H01L2224/03452 ,  H01L2924/00014 ,  H01L2224/0332 ,  H01L2924/00014 ,  H01L2224/03462 ,  H01L2924/00014 ,  H01L2224/03464 ,  H01L2924/00014 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/11464 ,  H01L2924/00014 ,  H01L2224/0333 ,  H01L2924/00012 ,  H01L2224/13616 ,  H01L2924/00014 ,  H01L2224/05616 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/01074 ,  H01L2224/13184 ,  H01L2924/01028 ,  H01L2224/13124 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/01082 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13139 ,  H01L2924/00014 ,  H01L2224/13116 ,  H01L2924/00014 ,  H01L2224/13113 ,  H01L2924/00014 ,  H01L2224/13169 ,  H01L2924/00014 ,  H01L2224/73201 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/94 ,  H01L2224/81 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20751 ,  H01L2224/45015 ,  H01L2924/20752 ,  H01L2224/45015 ,  H01L2924/20753 ,  H01L2224/45015 ,  H01L2924/20754 ,  H01L2224/45015 ,  H01L2924/20755 ,  H01L2224/45015 ,  H01L2924/20756 ,  H01L2224/45015 ,  H01L2924/20757 ,  H01L2224/45015 ,  H01L2924/20758 ,  H01L2224/45015 ,  H01L2924/20759 ,  H01L2224/45015 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20751 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20753 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20754 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20755 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20756 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20757 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20758 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20759 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2224/45099

摘要： Apparatus(es) and method(s) relate generally to via arrays on a substrate. In one such apparatus, the substrate has a conductive layer. First plated conductors are in a first region extending from a surface of the conductive layer. Second plated conductors are in a second region extending from the surface of the conductive layer. The first plated conductors and the second plated conductors are external to the first substrate. The first region is disposed at least partially within the second region. The first plated conductors are of a first height. The second plated conductors are of a second height greater than the first height. A second substrate is coupled to first ends of the first plated conductors. The second substrate has at least one electronic component coupled thereto. A die is coupled to second ends of the second plated conductors. The die is located over the at least one electronic component.

公开(公告)号：US09478485B2

公开(公告)日：2016-10-25

申请号：US14261252

申请日：2014-04-24

申请人： STATS ChipPAC, Ltd.

发明人： XuSheng Bao ,  KwokKeung Szeto

IPC分类号： H01L23/498 ,  H01L23/522 ,  H01L23/00 ,  H01L23/538 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L21/683

CPC分类号： H01L23/49811 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14134 ,  H01L2224/14135 ,  H01L2224/24147 ,  H01L2224/244 ,  H01L2224/821 ,  H01L2224/8236 ,  H01L2224/94 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2224/05572 ,  H01L2224/05664 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/13184 ,  H01L2924/00012

摘要： A semiconductor device has a first semiconductor die. A first interconnect structure, such as a conductive pillar including a bump formed over the conductive pillar, and second interconnect structure are formed in a peripheral region of the first semiconductor die. A second semiconductor die is disposed over the first semiconductor die between the first interconnect structure and the second interconnect structure. A height of the second semiconductor die is less than a height of the first interconnect structure. A footprint of the second semiconductor die is smaller than a central region of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and second semiconductor die. Alternatively, the second semiconductor die is disposed over a semiconductor package including a plurality of interconnect structures. External connectivity from the single side fo-WLCSP is performed without the use of conductive vias to provide a high throughput and device reliability.

摘要翻译： 半导体器件具有第一半导体管芯。 在第一半导体管芯的周边区域中形成第一互连结构，例如包括形成在导电柱上的凸块的导电柱和第二互连结构。 第二半导体管芯设置在第一半导体管芯之间的第一互连结构和第二互连结构之间。 第二半导体管芯的高度小于第一互连结构的高度。 第二半导体管芯的占地面积小于第一半导体管芯的中心区域。 密封剂沉积在第一半导体管芯和第二半导体管芯上。 或者，第二半导体管芯设置在包括多个互连结构的半导体封装上。 执行单面fo-WLCSP的外部连接，而不使用导电通孔来提供高吞吐量和器件可靠性。

公开(公告)号：US09437551B2

公开(公告)日：2016-09-06

申请号：US14179854

申请日：2014-02-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jung Wei Cheng ,  Tsung-Ding Wang ,  Chien-Hsun Lee

IPC分类号： H01L23/00 ,  H01L23/544

CPC分类号： H01L24/14 ,  H01L21/78 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/0214 ,  H01L2224/0215 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05011 ,  H01L2224/05012 ,  H01L2224/05013 ,  H01L2224/05014 ,  H01L2224/05015 ,  H01L2224/05024 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06132 ,  H01L2224/06179 ,  H01L2224/06517 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13562 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14104 ,  H01L2224/14132 ,  H01L2224/14134 ,  H01L2224/14179 ,  H01L2224/14517 ,  H01L2224/16013 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/17051 ,  H01L2224/17515 ,  H01L2224/17517 ,  H01L2224/81007 ,  H01L2224/81139 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/81345 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2225/06593 ,  H01L2924/01022 ,  H01L2924/01073 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029

摘要： An integrated circuit structure includes an alignment bump and an active electrical connector. The alignment bump includes a first non-solder metallic bump. The first non-solder metallic bump forms a ring encircling an opening therein. The active electrical connector includes a second non-solder metallic bump. A surface of the first non-solder metallic bump and a surface of the second non-solder metallic bump are substantially coplanar with each other.

摘要翻译： 集成电路结构包括对准凸块和有源电连接器。 对准凸块包括第一非焊接金属凸块。 第一非焊接金属凸块形成环绕其中的开口的环。 有源电连接器包括第二非焊接金属凸块。 第一非焊料金属凸块的表面和第二非焊料金属凸块的表面基本上彼此共面。

公开(公告)号：US20150380377A1

公开(公告)日：2015-12-31

申请号：US14841381

申请日：2015-08-31

申请人： Invensas Corporation

发明人： CYPRIAN EMEKA UZOH ,  Rajesh Katkar

IPC分类号： H01L23/00 ,  H01L25/16

CPC分类号： H01L25/0657 ,  B81B7/0074 ,  H01L21/4853 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/522 ,  H01L23/5383 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2224/0239 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/13616 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/14134 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2224/24147 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48149 ,  H01L2224/4903 ,  H01L2224/73201 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/3841 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01028 ,  H01L2924/01082 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/81 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2224/45099

摘要： Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires (“first wires”) extend from a surface of the substrate. Second wire bond wires (“second wires”) extend from the surface of the substrate. The first wires and the second wires are external to the substrate. The first wires are disposed at least partially within the second wires. The first wires are of a first height. The second wires are of a second height greater than the first height for coupling of at least one electronic component to the first wires at least partially disposed within the second wires.

摘要翻译： 公开了一般涉及衬底的装置。 在这种装置中，第一线接合线（“第一线”）从衬底的表面延伸。 第二线接合线（“第二线”）从衬底的表面延伸。 第一线和第二线在衬底外部。 第一导线至少部分地设置在第二导线内。 第一根导线是第一个高度。 第二导线的第二高度大于第一高度，用于将至少一个电子部件耦合到至少部分地设置在第二导线内的第一导线。

公开(公告)号：US09214441B2

公开(公告)日：2015-12-15

申请号：US14283833

申请日：2014-05-21

申请人： Heungkyu Kwon ,  Kyoungmook Lim

发明人： Heungkyu Kwon ,  Kyoungmook Lim

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L24/30 ,  H01L24/06 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05571 ,  H01L2224/06131 ,  H01L2224/06134 ,  H01L2224/06155 ,  H01L2224/14131 ,  H01L2224/14134 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/29036 ,  H01L2224/3001 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2924/00011 ,  H01L2224/45099

摘要： According to example embodiments, a semiconductor package includes a first and a second semiconductor package. The first semiconductor package includes a first package substrate, first and second memory chips spaced apart from each other on the first package substrate in a first direction, third and fourth memory chips on the first and second memory chips, respectively, and first and second jumper chips on the first and second memory chips, respectively. The first and second jumper chips are spaced apart from the third and fourth memory chips, respectively, in a second direction crossing the first direction. The second semiconductor package may include a second package substrate and a logic chip on the second package substrate. The first semiconductor package may be on the second semiconductor package.

摘要翻译： 根据示例性实施例，半导体封装包括第一和第二半导体封装。 第一半导体封装包括第一封装衬底，在第一方向上在第一封装衬底上彼此间隔开的第一和第二存储器芯片，分别在第一和第二存储器芯片上的第三和第四存储器芯片，以及第一和第二跳线 分别在第一和第二存储器芯片上的芯片。 第一和第二跳线芯片分别与第三和第四存储器芯片在与第一方向交叉的第二方向上分开。 第二半导体封装可以包括第二封装衬底和第二封装衬底上的逻辑芯片。 第一半导体封装可以在第二半导体封装上。

公开(公告)号：US20150228600A1

公开(公告)日：2015-08-13

申请号：US14175080

申请日：2014-02-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Hung Lin

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L25/0657 ,  H01L21/565 ,  H01L21/78 ,  H01L21/784 ,  H01L23/3114 ,  H01L23/315 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/11009 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/14131 ,  H01L2224/14133 ,  H01L2224/14134 ,  H01L2224/14179 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/1032 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01029

摘要： A chip includes a semiconductor substrate, an electrical connector over the semiconductor substrate, and a molding compound molding a lower part of the electrical connector therein. A top surface of the molding compound is lower than a top end of the electrical connector. A recess extends from the top surface of the molding compound into the molding compound.

摘要翻译： 芯片包括半导体衬底，半导体衬底上的电连接器，以及将电连接器的下部模制成型的模制复合体。 模制化合物的顶表面低于电连接器的顶端。 凹部从模塑料的顶表面延伸到模塑料中。

公开(公告)号：US09099340B2

公开(公告)日：2015-08-04

申请号：US13644693

申请日：2012-10-04

申请人： Volterra Semiconductor Corporation

发明人： Mihalis Michael ,  Kwang Hong Tan ,  Ilija Jergovic ,  Chiteh Chiang ,  Anthony Stratakos

IPC分类号： H05K1/11 ,  H01L25/10 ,  H01L23/50 ,  H01L21/56 ,  H01L23/36 ,  H01L23/522 ,  H01L23/528 ,  H01L23/31 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498

CPC分类号： H01L23/49838 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3185 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/4952 ,  H01L23/49527 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5223 ,  H01L23/5286 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L25/105 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1191 ,  H01L2224/1302 ,  H01L2224/13024 ,  H01L2224/13026 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/14131 ,  H01L2224/14134 ,  H01L2224/14177 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1427 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/16152 ,  H01L2924/16196 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/381 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/014 ,  H01L2924/00

摘要： Various applications of interconnect substrates in power management systems are described.

摘要翻译： 描述了电源管理系统中互连基板的各种应用。

公开(公告)号：US20150021759A1

公开(公告)日：2015-01-22

申请号：US13943284

申请日：2013-07-16

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Hsien-Wei CHEN

IPC分类号： H01L23/498 ,  H01L23/00

CPC分类号： H01L24/17 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/11005 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14134 ,  H01L2224/14164 ,  H01L2224/14177 ,  H01L2224/14179 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/1713 ,  H01L2224/17135 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01011 ,  H01L2924/01079 ,  H01L2924/00012

摘要： Embodiments of mechanisms for forming a package structure are provided. A method for forming a package structure includes providing a semiconductor die and forming a first bump structure and a second bump structure over the semiconductor die. The second bump structure is thinner and wider than the first bump structure.The method also includes providing a substrate having a first contact pad and a second contact pad formed on the substrate. The method further includes forming a first solder paste structure and a second solder paste structure over the first contact pad and the second contact pad, respectively. The second solder paste structure is thicker than the first solder paste structure. In addition, the method includes reflowing the first bump structure and the second bump structure with the first solder paste structure and the second solder paste structure, respectively, to bond the semiconductor die to the substrate.

摘要翻译： 提供了用于形成封装结构的机构的实施例。 一种用于形成封装结构的方法包括提供半导体管芯并在半导体管芯上方形成第一凸块结构和第二凸块结构。 第二凸块结构比第一凸块结构更薄和更宽。 该方法还包括提供具有第一接触焊盘和形成在基板上的第二接触焊盘的衬底。 该方法还包括分别在第一接触焊盘和第二接触焊盘上形成第一焊膏结构和第二焊膏结构。 第二焊膏结构比第一焊膏结构厚。 此外，该方法包括分别用第一焊膏结构和第二焊膏结构回流第一凸块结构和第二凸块结构，以将半导体管芯接合到衬底。

公开(公告)号：US20150001709A1

公开(公告)日：2015-01-01

申请号：US14261252

申请日：2014-04-24

申请人： STATS ChipPAC, Ltd.

发明人： XuSheng Bao ,  KwokKeung Szeto

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L23/522

CPC分类号： H01L23/49811 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14134 ,  H01L2224/14135 ,  H01L2224/24147 ,  H01L2224/244 ,  H01L2224/821 ,  H01L2224/8236 ,  H01L2224/94 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2224/05572 ,  H01L2224/05664 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/13184 ,  H01L2924/00012

摘要： A semiconductor device has a first semiconductor die. A first interconnect structure, such as a conductive pillar including a bump formed over the conductive pillar, and second interconnect structure are formed in a peripheral region of the first semiconductor die. A second semiconductor die is disposed over the first semiconductor die between the first interconnect structure and the second interconnect structure. A height of the second semiconductor die is less than a height of the first interconnect structure. A footprint of the second semiconductor die is smaller than a central region of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and second semiconductor die. Alternatively, the second semiconductor die is disposed over a semiconductor package including a plurality of interconnect structures. External connectivity from the single side fo-WLCSP is performed without the use of conductive vias to provide a high throughput and device reliability.

摘要翻译： 半导体器件具有第一半导体管芯。 在第一半导体管芯的周边区域中形成第一互连结构，例如包括形成在导电柱上的凸块的导电柱和第二互连结构。 第二半导体管芯设置在第一半导体管芯之间的第一互连结构和第二互连结构之间。 第二半导体管芯的高度小于第一互连结构的高度。 第二半导体管芯的占地面积小于第一半导体管芯的中心区域。 密封剂沉积在第一半导体管芯和第二半导体管芯上。 或者，第二半导体管芯设置在包括多个互连结构的半导体封装上。 执行单面fo-WLCSP的外部连接，而不使用导电通孔来提供高吞吐量和器件可靠性。