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公开(公告)号：US20230068263A1
公开(公告)日：2023-03-02
申请号：US17460319
申请日：2021-08-30
发明人： Mao-Yen Chang , Yu-Chia Lai , Cheng-Shiuan Wong , Ting Hao Kuo , Ching-Hua Hsieh , Hao-Yi Tsai , Kuo-Lung Pan , Hsiu-Jen Lin
IPC分类号： H01L23/00 , H01L21/56 , H01L23/58 , H01L23/544
摘要： A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.
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公开(公告)号：US20210305212A1
公开(公告)日：2021-09-30
申请号：US17315381
申请日：2021-05-10
发明人： Wei-Kang Hsieh , Hung-Yi Kuo , Hao-Yi Tsai , Kuo-Lung Pan , Ting Hao Kuo , Yu-Chia Lai , Mao-Yen Chang , Po-Yuan Teng , Shu-Rong Chun
IPC分类号： H01L25/065 , H01L23/00 , H01L25/00
摘要： A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.
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公开(公告)号：US11424213B2
公开(公告)日：2022-08-23
申请号：US17017622
申请日：2020-09-10
发明人： Mao-Yen Chang , Chih-Wei Lin , Hao-Yi Tsai , Kuo-Lung Pan , Chun-Cheng Lin , Tin-Hao Kuo , Yu-Chia Lai , Chih-Hsuan Tai
IPC分类号： H01L23/00 , H01L25/00 , H01L21/56 , H01L23/538 , H01L25/18
摘要： A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.
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公开(公告)号：US20220415737A1
公开(公告)日：2022-12-29
申请号：US17358001
申请日：2021-06-25
发明人： Cheng-Chieh Wu , Ting Hao Kuo , Kuo-Lung Pan , Po-Yuan Teng , Yu-Chia Lai , Shu-Rong Chun , Mao-Yen Chang , Wei-Kang Hsieh , Pavithra Sriram , Hao-Yi Tsai , Po-Han Wang , Yu-Hsiang Hu , Hung-Jui Kuo
IPC分类号： H01L23/31 , H01L23/538 , H01L23/29 , H01L25/065 , H01L23/00 , H01L21/56 , H01L21/48
摘要： A semiconductor device includes semiconductor dies and a redistribution structure. The semiconductor dies are encapsulated in an encapsulant. The redistribution structure extends on the encapsulant and electrically connects the semiconductor dies. The redistribution structure includes dielectric layers and redistribution conductive layers alternately stacked. An outermost dielectric layer of the dielectric layers further away from the semiconductor dies is made of a first material. A first dielectric layer of the dielectric layers on which the outermost dielectric layer extends is made of a second material different from the first material. The first material includes at least one material selected from the group consisting of an epoxy resin, a phenolic resin, a polybenzooxazole, and a polyimide having a curing temperature lower than 250° C.
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公开(公告)号：US20220336404A1
公开(公告)日：2022-10-20
申请号：US17857035
申请日：2022-07-03
发明人： Mao-Yen Chang , Chih-Wei Lin , Hao-Yi Tsai , Kuo-Lung Pan , Chun-Cheng Lin , Tin-Hao Kuo , Yu-Chia Lai , Chih-Hsuan Tai
IPC分类号： H01L23/00 , H01L25/00 , H01L21/56 , H01L23/538 , H01L25/18
摘要： A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.
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公开(公告)号：US20220077102A1
公开(公告)日：2022-03-10
申请号：US17017622
申请日：2020-09-10
发明人： Mao-Yen Chang , Chih-Wei Lin , Hao-Yi Tsai , Kuo-Lung Pan , Chun-Cheng Lin , Tin-Hao Kuo , Yu-Chia Lai , Chih-Hsuan Tai
IPC分类号： H01L23/00 , H01L25/18 , H01L25/00 , H01L21/56 , H01L23/538
摘要： A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.
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