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1.发明授权公开(公告)号：US09257483B2
公开(公告)日：2016-02-09
申请号：US13522076
申请日：2011-01-13
CPC分类号： H01L27/228 , G11C11/16 , G11C11/161 , G11C11/1659 , G11C11/5607 , H01L29/82 , H01L43/08 , H01L43/12
摘要： There is provided a magnetic memory with using a magnetoresistive effect element of a spin-injection magnetization reversal type, in which a multi-value operation is possible and whose manufacturing and operation are simple. A preferred aim of this is solved by providing two or more magnetoresistive effect elements which are electrically connected in series to each other and by selecting one of the series-connected elements depending on a direction of a current carried in the series-connected elements, a magnitude thereof, and an order of the current thereof for performing the writing operation. For example, it is solved by differentiating plane area sizes of the respective magnetoresistive effect elements which have the same film structure from each other so as to differentiate resistance change amounts caused by respective magnetization reversal and threshold current values required for respective magnetization reversal from each other.
摘要翻译： 提供了一种使用自旋注入磁化反转型的磁阻效应元件的磁存储器，其中多值操作是可能的，其制造和操作简单。 优选的目的是通过提供两个或更多个彼此串联电连接的磁阻效应元件来解决，并且根据串联连接的元件中承载的电流的方向选择串联元件之一， 其大小及其电流的顺序用于执行写入操作。 例如，通过将具有相同膜结构的各个磁阻效应元件的平面面积尺寸相互分离来解决，以便区分由相应的磁化反转引起的电阻变化量和相应磁化反转所需的阈值电流值 。
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2.发明申请公开(公告)号：US20130044537A1
公开(公告)日：2013-02-21
申请号：US13522076
申请日：2011-01-13
CPC分类号： H01L27/228 , G11C11/16 , G11C11/161 , G11C11/1659 , G11C11/5607 , H01L29/82 , H01L43/08 , H01L43/12
摘要： There is provided a magnetic memory with using a magnetoresistive effect element of a spin-injection magnetization reversal type, in which a multi-value operation is possible and whose manufacturing and operation are simple. A preferred aim of this is solved by providing two or more magnetoresistive effect elements which are electrically connected in series to each other and by selecting one of the series-connected elements depending on a direction of a current carried in the series-connected elements, a magnitude thereof, and an order of the current thereof for performing the writing operation. For example, it is solved by differentiating plane area sizes of the respective magnetoresistive effect elements which have the same film structure from each other so as to differentiate resistance change amounts caused by respective magnetization reversal and threshold current values required for respective magnetization reversal from each other.
摘要翻译： 提供了一种使用自旋注入磁化反转型的磁阻效应元件的磁存储器，其中多值操作是可能的，其制造和操作简单。 优选的目的是通过提供两个或更多个彼此串联电连接的磁阻效应元件来解决，并且根据串联元件中承载的电流的方向选择串联元件之一， 其大小及其电流的顺序用于执行写入操作。 例如，通过将具有相同膜结构的各个磁阻效应元件的平面面积尺寸相互分离来解决，以便区分由相应的磁化反转引起的电阻变化量和相应磁化反转所需的阈值电流值 。
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公开(公告)号：US20130051134A1
公开(公告)日：2013-02-28
申请号：US13643880
申请日：2011-04-05
IPC分类号： G11C11/16
CPC分类号： H01L27/228 , G11C7/1006 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , G11C11/5607
摘要： The disclosed semiconductor recording device achieves multi-valued reading and writing using a spin-injection magnetization-reversal tunneling magnetoresistive element (TMR element). A first current that has at least the same value as that of the element requiring the highest current to reverse the magnetization thereof among a plurality of TMR elements is, in the direction that causes reversal to either a parallel state or an anti-parallel state, applied to a memory cell having the plurality of TMR elements, and then a second current which is in the reverse direction from the first current and of which only the value needed to reverse the magnetoresistance state of at least one TMR element excluding the element requiring the maximum current among the plurality of TMR elements is applied to each, and multi-valued writing is performed.
摘要翻译： 所公开的半导体记录装置使用自旋注入磁化 - 反转隧道磁阻元件（TMR元件）实现多值读取和写入。 与在多个TMR元件之间需要最大电流以使其磁化反转的元件至少具有相同值的第一电流在引起反向并联状态或反并联状态的方向上， 应用于具有多个TMR元件的存储单元，然后施加与第一电流相反方向的第二电流，并且其中只有反转至少一个TMR元件的磁阻状态所需的值，除了需要 多个TMR元件中的最大电流被施加到每个，并且执行多值写入。
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公开(公告)号：US08750032B2
公开(公告)日：2014-06-10
申请号：US13643880
申请日：2011-04-05
IPC分类号： G11C11/00
CPC分类号： H01L27/228 , G11C7/1006 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1697 , G11C11/5607
摘要： The disclosed semiconductor recording device achieves multi-valued reading and writing using a spin-injection magnetization-reversal tunneling magnetoresistive element (TMR element). A first current that has at least the same value as that of the element requiring the highest current to reverse the magnetization thereof among a plurality of TMR elements is, in the direction that causes reversal to either a parallel state or an anti-parallel state, applied to a memory cell having the plurality of TMR elements, and then a second current which is in the reverse direction from the first current and of which only the value needed to reverse the magnetoresistance state of at least one TMR element excluding the element requiring the maximum current among the plurality of TMR elements is applied to each, and multi-valued writing is performed.
摘要翻译： 所公开的半导体记录装置使用自旋注入磁化 - 反转隧道磁阻元件（TMR元件）实现多值读取和写入。 与在多个TMR元件之间需要最大电流以使其磁化反转的元件至少具有相同值的第一电流在引起反向并联状态或反并联状态的方向上， 应用于具有多个TMR元件的存储单元，然后施加与第一电流相反方向的第二电流，并且其中只有反转至少一个TMR元件的磁阻状态所需的值，除了需要 多个TMR元件中的最大电流被施加到每个，并且执行多值写入。
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公开(公告)号：US08598594B2
公开(公告)日：2013-12-03
申请号：US13366313
申请日：2012-02-04
IPC分类号： H01L29/205 , H01L21/20
CPC分类号： H01L29/872 , H01L29/0649 , H01L29/2003 , H01L29/205 , H01L29/66143
摘要： In a semiconductor device including a stack structure having heterojunction units formed by alternately stacking GaN (gallium nitride) films and barrier films which are different in forbidden band width, a first electrode formed in a Schottky barrier contact with one sidewall of the stack structure, and a second electrode formed in contact with the other sidewall, an oxide film is interposed between the first electrode and the barrier films. Therefore, the reverse leakage current is prevented from flowing through defects remaining in the barrier films due to processing of the barrier films, so that a reverse leakage current of a Schottky barrier diode is reduced.
摘要翻译： 在包括具有通过交替层叠禁带宽度不同的GaN（氮化镓）膜和阻挡膜形成的异质结单元的堆叠结构的半导体器件中，形成为与堆叠结构的一个侧壁接触的肖特基势垒的第一电极，以及 形成为与另一侧壁接触的第二电极，在第一电极和阻挡膜之间插入氧化膜。 因此，由于阻挡膜的处理，防止反向泄漏电流流过残留在阻挡膜中的缺陷，使得肖特基势垒二极管的反向泄漏电流降低。
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6.发明授权公开(公告)号：US08143668B2
公开(公告)日：2012-03-27
申请号：US12481551
申请日：2009-06-09
IPC分类号： H01L29/78
CPC分类号： H01L21/823814 , H01L21/823828 , H01L21/823864
摘要： Performance of a semiconductor device having a MIS transistor is improved. A semiconductor device includes: a pair of source/drain regions each formed by stacking a semiconductor layer on a main surface of a silicon substrate; a sidewall insulating film covering each sidewall of the source/drain regions; a gate electrode arranged so as to interpose a gate insulating film on the main surface of the silicon substrate at a position sandwiched by the sidewall insulating films in a plane; and extension regions formed to extend from a portion below and lateral to the gate electrode to a portion below and lateral to each of the source/drain regions, wherein a sidewall of the sidewall insulating film being adjacent to the gate insulating film and the gate electrode has an inclination of a forward tapered shape.
摘要翻译： 提高了具有MIS晶体管的半导体器件的性能。 半导体器件包括：一对源极/漏极区域，每个源极/漏极区域通过在硅衬底的主表面上层叠半导体层而形成; 覆盖源极/漏极区域的每个侧壁的侧壁绝缘膜; 栅电极，被布置成在平面内被所述侧壁绝缘膜夹持的位置处在所述硅衬底的主表面上插入栅极绝缘膜; 以及延伸区域，其形成为从栅极电极下方和横向的部分延伸到每个源极/漏极区域的下方和侧面的部分，其中侧壁绝缘膜的侧壁与栅极绝缘膜和栅极电极相邻 具有向前锥形的倾斜。
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公开(公告)号：US20120061774A1
公开(公告)日：2012-03-15
申请号：US13299471
申请日：2011-11-18
IPC分类号： H01L29/78
CPC分类号： H01L21/823814 , H01L21/823828 , H01L21/823864
摘要： Performance of a semiconductor device having a MIS transistor is improved. A semiconductor device includes: a pair of source/drain regions each formed by stacking a semiconductor layer on a main surface of a silicon substrate; a sidewall insulating film covering each sidewall of the source/drain regions; a gate electrode arranged so as to interpose a gate insulating film on the main surface of the silicon substrate at a position sandwiched by the sidewall insulating films in a plane; and extension regions formed to extend from a portion below and lateral to the gate electrode to a portion below and lateral to each of the source/drain regions, wherein a sidewall of the sidewall insulating film being adjacent to the gate insulating film and the gate electrode has an inclination of a forward tapered shape.
摘要翻译： 提高了具有MIS晶体管的半导体器件的性能。 半导体器件包括：一对源极/漏极区域，每个源极/漏极区域通过在硅衬底的主表面上层叠半导体层而形成; 覆盖源极/漏极区域的每个侧壁的侧壁绝缘膜; 栅电极，被布置成在平面内被所述侧壁绝缘膜夹持的位置处在所述硅衬底的主表面上插入栅极绝缘膜; 以及延伸区域，其形成为从栅极电极下方和横向的部分延伸到每个源极/漏极区域的下方和侧面的部分，其中侧壁绝缘膜的侧壁与栅极绝缘膜和栅极电极相邻 具有向前锥形的倾斜。
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8.发明申请SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR STORAGE DEVICE 有权半导体器件，其制造方法和半导体存储器件公开(公告)号：US20120018807A1
公开(公告)日：2012-01-26
申请号：US13145108
申请日：2010-01-18
申请人： Ryuta Tsuchiya , Nobuyuki Sugii , Yusuke Morita , Hiroyuki Yoshimoto , Takashi Ishigaki , Shinichiro Kimura
发明人： Ryuta Tsuchiya , Nobuyuki Sugii , Yusuke Morita , Hiroyuki Yoshimoto , Takashi Ishigaki , Shinichiro Kimura
CPC分类号： H01L21/84 , H01L27/11 , H01L27/1108 , H01L27/1203 , H01L29/41783 , H01L29/665 , H01L29/78648
摘要： In an SOI-MISFET that operates with low power consumption at a high speed, an element area is reduced. While a diffusion layer region of an N-conductivity type MISFET region of the SOI type MISFET and a diffusion layer region of a P-conductivity type MISFET region of the SOI type MISFET are formed as a common region, well diffusion layers that apply substrate potentials to the N-conductivity type MISFET region and the P-conductivity type MISFET region are separated from each other by an STI layer. The diffusion layer regions that are located in the N- and P-conductivity type MISFET regions) and serve as an output portion of a CMISFET are formed as a common region and directly connected by silicified metal so that the element area is reduced.
摘要翻译： 在以高功率低功耗工作的SOI-MISFET中，元件面积减小。 虽然SOI型MISFET的N导电型MISFET区域的扩散层区域和SOI型MISFET的P导电型MISFET区域的扩散层区域形成为公共区域，但是施加衬底电位的阱扩散层 通过STI层将N导电型MISFET区域和P导电型MISFET区域相互分离。 位于N和P导电型MISFET区域中的扩散层区域）作为CMISFET的输出部分形成为公共区域，并通过硅化金属直接连接，使元件面积减小。
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公开(公告)号：US08476731B2
公开(公告)日：2013-07-02
申请号：US13349959
申请日：2012-01-13
CPC分类号： H01L29/872 , H01L29/0649 , H01L29/2003
摘要： In a Schottky electrode formation region on a nitride semiconductor, the total length of junctions of Schottky electrodes and a surface of a nitride semiconductor layer is longer than the perimeter of the Schottky electrode formation region. The total length is preferably 10 times longer than the perimeter. For example, the Schottky electrodes are formed concentrically and circularly.
摘要翻译： 在氮化物半导体上的肖特基电极形成区域中，肖特基电极和氮化物半导体层的表面的总长度比肖特基电极形成区域的周长长。 总长度优选比周长长10倍。 例如，肖特基电极同心圆形地形成。
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公开(公告)号：US08183635B2
公开(公告)日：2012-05-22
申请号：US12756451
申请日：2010-04-08
申请人： Nobuyuki Sugii , Ryuta Tsuchiya , Shinichiro Kimura , Takashi Ishigaki , Yusuke Morita , Hiroyuki Yoshimoto
发明人： Nobuyuki Sugii , Ryuta Tsuchiya , Shinichiro Kimura , Takashi Ishigaki , Yusuke Morita , Hiroyuki Yoshimoto
IPC分类号： H01L21/00
CPC分类号： H01L27/1203 , H01L21/76283
摘要： A technique to be applied to a semiconductor device for achieving low power consumption by improving a shape at a boundary portion of a shallow trench and an SOI layer of an SOI substrate. A position (SOI edge) at which a main surface of a silicon substrate and a line extended along a side surface of an SOI layer are crossed is recessed away from a shallow-trench isolation more than a position (STI edge) at which a line extended along a sidewall of a shallow trench and a line extended along the main surface of the silicon substrate are crossed, and a corner of the silicon substrate at the STI edge has a curved surface.
摘要翻译： 通过改善在SOI衬底的浅沟槽和SOI层的边界部分的形状来实现低功耗的半导体器件的技术。 硅衬底的主表面和沿着SOI层的侧表面延伸的线交叉的位置（SOI边缘）比浅沟槽隔离更远离位于（STI边缘）的位置（STI边缘），在该位置处 沿着浅沟槽的侧壁延伸并且沿着硅衬底的主表面延伸的线交叉，并且在STI边缘处的硅衬底的拐角具有弯曲表面。
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