公开(公告)号：US20120068179A1

公开(公告)日：2012-03-22

申请号：US13051524

申请日：2011-03-18

申请人： Tatsuya Ishida ,  Masahiro Inohara

发明人： Tatsuya Ishida ,  Masahiro Inohara

IPC分类号： H01L29/786 ,  H01L21/768

CPC分类号： H01L29/458 ,  H01L27/0688 ,  H01L27/124

摘要： According to embodiments, there is provided a semiconductor device, including: a logic circuit; an interlayer insulating film formed above the logic circuit; an amorphous silicon layer including: a non-silicide layer formed on the interlayer insulating film; and a silicide layer formed on the non-silicide layer; a TFT formed on the amorphous silicon layer; and a contact plug formed to plug a through hole penetrating the interlayer insulating film, the contact plug being electrically connected to the logic circuit, an upper part of the contact plug being connected to the silicide layer.

摘要翻译： 根据实施例，提供一种半导体器件，包括：逻辑电路; 形成在逻辑电路上方的层间绝缘膜; 非晶硅层，包括：在所述层间绝缘膜上形成的非硅化物层; 以及形成在所述非硅化物层上的硅化物层; 形成在非晶硅层上的TFT; 以及接触插塞，其形成为插入穿过所述层间绝缘膜的通孔，所述接触插塞电连接到所述逻辑电路，所述接触插塞的上部连接到所述硅化物层。

公开(公告)号：US08629437B2

公开(公告)日：2014-01-14

申请号：US13051524

申请日：2011-03-18

申请人： Tatsuya Ishida ,  Masahiro Inohara

发明人： Tatsuya Ishida ,  Masahiro Inohara

IPC分类号： H01L21/768 ,  H01L29/786

CPC分类号： H01L29/458 ,  H01L27/0688 ,  H01L27/124

摘要： According to embodiments, there is provided a semiconductor device, including: a logic circuit; an interlayer insulating film formed above the logic circuit; an amorphous silicon layer including: a non-silicide layer formed on the interlayer insulating film; and a silicide layer formed on the non-silicide layer; a TFT formed on the amorphous silicon layer; and a contact plug formed to plug a through hole penetrating the interlayer insulating film, the contact plug being electrically connected to the logic circuit, an upper part of the contact plug being connected to the silicide layer.

摘要翻译： 根据实施例，提供一种半导体器件，包括：逻辑电路; 形成在逻辑电路上方的层间绝缘膜; 非晶硅层，包括：在所述层间绝缘膜上形成的非硅化物层; 以及形成在所述非硅化物层上的硅化物层; 形成在非晶硅层上的TFT; 以及接触插塞，其形成为插入穿过所述层间绝缘膜的通孔，所述接触插塞电连接到所述逻辑电路，所述接触插塞的上部连接到所述硅化物层。

公开(公告)号：US08102059B2

公开(公告)日：2012-01-24

申请号：US12402018

申请日：2009-03-11

申请人： Masahiro Inohara

发明人： Masahiro Inohara

IPC分类号： H01L23/535

CPC分类号： H01L23/5283 ,  H01L23/5226 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/1903 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00

摘要： A higher aspect ratio for upper level metal interconnects is described for use in higher frequency circuits. Because the skin effect reduces the effective cross-sectional area of conductors at higher frequencies, various approaches are described to reduce the effective RC delay in interconnects.

摘要翻译： 上级金属互连的高宽比被描述为用于较高频率电路。 因为皮肤效应会降低导体在较高频率下的有效横截面积，所以描述了各种方法来减少互连中的有效RC延迟。

公开(公告)号：US07325225B2

公开(公告)日：2008-01-29

申请号：US11243933

申请日：2005-10-05

申请人： Yasushi Tanaka ,  Masahiro Inohara ,  Matthew Angyal

发明人： Yasushi Tanaka ,  Masahiro Inohara ,  Matthew Angyal

IPC分类号： G06F17/50

CPC分类号： G03F1/36 ,  G03F1/68

摘要： It is important to assess and reduce errors that arise in mask correction techniques such as optical proximity correction. A preliminary mask is obtained using an OPC model. An etched wafer is created from the preliminary mask using lithography, and first and second critical dimensions (CD) are measured on the wafer and. An edge placement error (EPE) is determined that corresponds to a difference between a measured value and a desired value of the second CD. These steps are repeated for a plurality of different values of the first CD, and of for each of the values of, the measured value of the second CD is correlated with its corresponding value on the mask as predicted by the OPC model. Δ difference ΔCD is obtained between the difference of the mask CDs calculated by interpolation of wafer CD measurements and by OPC model predictions and is transformed into an OPC model error.

摘要翻译： 重要的是评估和减少在诸如光学邻近校正的掩模校正技术中出现的错误。 使用OPC模型获得初步掩模。 使用光刻从初步掩模创建蚀刻的晶片，并且在晶片上测量第一和第二临界尺寸（CD）。 确定对应于测量值和第二CD的期望值之间的差的边缘放置误差（EPE）。 对于第一CD的多个不同值重复这些步骤，并且对于每个值，第二CD的测量值与由OPC模型预测的掩模上的对应值相关。 在通过晶片CD测量的插值和OPC模型预测计算出的掩模CD的差异之间获得差值DeltaCD，并将其转换为OPC模型误差。

公开(公告)号：US08252692B2

公开(公告)日：2012-08-28

申请号：US13169140

申请日：2011-06-27

申请人： Masahiro Inohara

发明人： Masahiro Inohara

IPC分类号： H01L29/72

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device according to one embodiment includes: a substrate having an element region where a semiconductor element is formed; a via hole formed in a portion of the substrate adjacent to the element region; a conducting portion provided in the via hole via an insulating layer; and a buffer layer provided between the substrate and the insulating layer, wherein the buffer layer is made of a material in which a difference in thermal expansion coefficient between the substrate and the buffer layer is smaller than that between the substrate and the insulating layer.

摘要翻译： 根据一个实施例的半导体器件包括：具有形成半导体元件的元件区域的衬底; 形成在所述基板的与所述元件区域相邻的部分中的通孔; 导电部，其经由绝缘层设置在所述通孔中; 以及设置在所述基板和所述绝缘层之间的缓冲层，其中所述缓冲层由所述基板和所述缓冲层之间的热膨胀系数的差小于所述基板和所述绝缘层之间的热膨胀系数的差异的材料制成。

公开(公告)号：US20050001255A1

公开(公告)日：2005-01-06

申请号：US10902579

申请日：2004-07-30

申请人： Takashi Yoshitomi ,  Tatsuya Ohguro ,  Ryoji Hasumi ,  Hideki Kimijima ,  Takashi Yamaguchi ,  Masahiro Inohara

发明人： Takashi Yoshitomi ,  Tatsuya Ohguro ,  Ryoji Hasumi ,  Hideki Kimijima ,  Takashi Yamaguchi ,  Masahiro Inohara

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L27/06 ,  H01L27/08 ,  H01L27/108

CPC分类号： H01L28/60 ,  H01L27/0629 ,  H01L27/0805

摘要： At present, Cu (copper) is being used as a wiring material. In an RF-CMOS device as a combination of an RF analog device and CMOS logic device, two electrodes of a MIM capacitor are formed from Cu having a large diffusion coefficient. To prevent Cu from diffusing to the capacitor insulating film of the MIM capacitor, diffusion prevention films having a function of preventing diffusion of Cu are interposed between the capacitor insulating film and the two electrodes. As a result, Cu forming the electrodes does not diffuse to the capacitor insulating film.

公开(公告)号：US5948698A

公开(公告)日：1999-09-07

申请号：US951164

申请日：1997-10-15

申请人： Masahiro Inohara ,  Tadashi Matsuno

发明人： Masahiro Inohara ,  Tadashi Matsuno

IPC分类号： H01L21/3205 ,  H01L21/304 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/762 ,  H01L21/768 ,  H01L21/302

CPC分类号： H01L21/31053 ,  H01L21/3212 ,  H01L21/76229 ,  H01L21/76819 ,  H01L21/7684

摘要： A method for fabricating a semiconductor device at low cost is provided in which a mask layer having a very large polishing selection ratio is used as a polishing stop film by forming the polishing stop film in self-alignment. An object layer to be flattened is formed on a substrate. The object layer contains an irregularity. A polishing stop film which is polished at a slower rate and a mask layer which is polished at about the same rate as the object layer are deposited on the object layer. Then, the mask layer on a high level portion of the object layer is removed by chemical-mechanical polishing. The polishing stop film is etched other than under the mask layer, so that the polishing stop film at the high level portion and side wall of the step is removed. Because the polishing stop film at the convex portions (high level portion) is removed by etching utilizing a chemical reaction without using chemical-mechanical polishing, it is possible to select a material for the polishing stop film which is polished at a very slow rate. After that, the mask layer and the object layer at the convex portion are removed by CMP to level off the object layer with the concave portion.

摘要翻译： 提供了一种以低成本制造半导体器件的方法，其中通过以自对准形成抛光停止膜，将具有非常大的抛光选择比的掩模层用作抛光停止膜。 待平坦化的物体层形成在基板上。 对象层包含不规则。 以较慢的速度抛光的抛光停止膜和以与物体层大致相同的速率抛光的掩模层沉积在物体层上。 然后，通过化学机械抛光去除目标层高层部分上的掩模层。 除了在掩模层下面蚀刻抛光停止膜，从而去除在台阶的高级部分和侧壁处的抛光停止膜。 由于在不使用化学机械抛光的情况下通过化学反应的蚀刻来除去凸部（高级部）的抛光停止膜，因此可以选择以非常慢的速度抛光的抛光停止膜的材料。 之后，通过CMP去除掩模层和凸部处的物体层，使其与凹部平坦化。

公开(公告)号：US20100317615A1

公开(公告)日：2010-12-16

申请号：US12806550

申请日：2010-08-16

申请人： Masahiro Inohara ,  Masahito Yoshikawa ,  Takashi Taniguchi ,  Mitsuru Yokota ,  Naoki Shimoyama ,  Masaki Ue ,  Miho Araki

发明人： Masahiro Inohara ,  Masahito Yoshikawa ,  Takashi Taniguchi ,  Mitsuru Yokota ,  Naoki Shimoyama ,  Masaki Ue ,  Miho Araki

IPC分类号： A61K31/729 ,  A61P27/02

CPC分类号： A61K9/0048 ,  A61K9/08

摘要： A method of enhancing ocular penetration of a drug in an eyedrop by administering to an eye, an eyedrop containing, particulate agar having a weight-average molecular weight of from 5,000 to 1,200,000, the particulate agar being obtained by dissolving agar into an aqueous solution by heating and then cooling the resultant mixture to avoid gelling, while applying a stress by vibration, shearing, stirring, compression or pulverizing, wherein the particulate agar is in an amount of 0.1 to 10 wt %.

摘要翻译： 通过向眼睛施用含有重均分子量为5,000至1,200,000的含有滴眼剂的颗粒状琼脂的眼睛，通过将琼脂溶解在水溶液中而获得的颗粒状琼脂通过 加热，然后冷却所得混合物以避免胶凝，同时通过振动，剪切，搅拌，压缩或粉碎施加应力，其中颗粒状琼脂的量为0.1至10重量％。

公开(公告)号：US20100249342A1

公开(公告)日：2010-09-30

申请号：US12741652

申请日：2007-11-08

申请人： Takeshi Unohara ,  Yoshiki Makabe ,  Naoya Nakamura ,  Kei Saitoh ,  Atsushi Ishio ,  Masahiro Inohara

发明人： Takeshi Unohara ,  Yoshiki Makabe ,  Naoya Nakamura ,  Kei Saitoh ,  Atsushi Ishio ,  Masahiro Inohara

IPC分类号： C08G75/14

CPC分类号： C08G75/0259 ,  C08G75/0213

摘要： A process for producing a polyphenylene sulfide resin with properties of (1) 0.3 wt % or less in the amount of the volatile gas generated when heated and melted at 320° C. in vacuum for 2 hours, (2) 0.3 wt % or less in the ash content achieved when incinerated at 550° C., (3) 4.0 wt % or less in the residue amount achieved when a solution with 1 part by weight of the polyphenylene sulfide resin dissolved in 20 parts by weight of 1-chloronaphthalene is pressure-filtered by a PTFE membrane filter with a pore size of 1 μm at 250° C. for 5 minutes, and (4) higher than 500 g/10 min in melt flow rate (according to ASTM D-1238-70: measured at a temperature of 315.5° C. and at a load of 5000 g), by acid-treating a polyphenylene sulfide resin in an acid treatment step and subsequently treating it for thermal oxidation in a thermal oxidation step.

摘要翻译： 一种聚苯硫醚树脂的制造方法，其特征在于，在320℃，真空中加热熔融2小时时产生的挥发性气体的量为0.3重量％以下，（2）0.3重量％以下 当在550℃下焚烧时实现的灰分含量为（3）当溶解在20重量份1-氯萘中的1重量份聚苯硫醚树脂的溶液中时，残留量为4.0重量％以下为 通过孔径为1μm的PTFE膜过滤器在250℃下进行5分钟压力过滤，和（4）高于500g / 10min的熔体流动速率（根据ASTM D-1238-70：测量 在315.5℃的温度和5000g的负荷下），在酸处理步骤中对聚苯硫醚树脂进行酸处理，随后在热氧化步骤中进行热氧化处理。

公开(公告)号：US20070079278A1

公开(公告)日：2007-04-05

申请号：US11243933

申请日：2005-10-05

申请人： Yasushi Tanaka ,  Masahiro Inohara ,  Matthew Angyal

发明人： Yasushi Tanaka ,  Masahiro Inohara ,  Matthew Angyal

IPC分类号： G06F17/50

CPC分类号： G03F1/36 ,  G03F1/68

摘要： A method is provided of accessing model error in an optical proximity correction (OPC) model. The method begins by obtaining a preliminary mask using an OPC model, creating an etched wafer from the preliminary mask using lithography, and measuring a specified critical dimension (CD) on the wafer and a second CD on the wafer. An edge placement error (EPE) is determined that corresponds to a difference between a measured value of the second CD on the wafer and a desired value of the second CD on the wafer. The aforementioned steps are repeated for a plurality of different values of the specified CD to obtain an EPE for each of the different values of the specified CD. For each of the plurality of values of the specified CD, a measured value of a second CD on the wafer is correlated with a corresponding value of the second CD on the mask. For each of the plurality of values of the specified CD, the measured value of the second CD on the wafer is correlated with its corresponding value of the second CD on the mask as predicted by the OPC model. For each of the immediately preceding correlations that are obtained, and at a selected measured value of the second CD on the wafer, a difference Δ is obtained between the difference of the mask CDs calculated by interpolation of wafer CD measurements and by OPC model predictions. Each value of Δ is transformed into an OPC model error that each correspond to a particular value of the specified CD.

摘要翻译： 提供了一种访问光学邻近校正（OPC）模型中的模型误差的方法。 该方法开始于使用OPC模型获得初步掩模，使用光刻从初步掩模创建蚀刻晶片，并测量晶片上的指定临界尺寸（CD）和晶片上的第二CD。 确定对应于晶片上的第二CD的测量值与晶片上的第二CD的期望值之间的差异的边缘放置误差（EPE）。 针对指定CD的多个不同值重复上述步骤，以获得指定CD的每个不同值的EPE。 对于指定CD的多个值中的每一个，晶片上的第二CD的测量值与掩模上的第二CD的相应值相关。 对于指定CD的多个值中的每一个，晶片上的第二CD的测量值与由OPC模型预测的掩模上的第二CD的对应值相关。 对于所获得的每个先前相关性，并且在晶片上的第二CD的选定测量值处，通过硅片CD测量的插值和通过OPC模型预测计算出的掩模CD的差异获得差值Delta。 Delta的每个值被转换成OPC模型错误，每个对应于指定CD的特定值。