公开(公告)号：US07923788B2

公开(公告)日：2011-04-12

申请号：US12207121

申请日：2008-09-09

申请人： Tatsuya Ohguro ,  Takashi Izumida ,  Satoshi Inaba ,  Kimitoshi Okano ,  Nobutoshi Aoki

发明人： Tatsuya Ohguro ,  Takashi Izumida ,  Satoshi Inaba ,  Kimitoshi Okano ,  Nobutoshi Aoki

IPC分类号： H01L21/28 ,  H01L29/08

CPC分类号： H01L29/785 ,  H01L29/66795

摘要： A semiconductor device has a plurality of fins formed on a semiconductor substrate to be separated from each other, a first contact region which connects commonly one end side of the plurality of fins, a second contact region which connects commonly the other end side of the plurality of fins, a gate electrode arranged to be opposed to at least both side surfaces of the plurality of fins by sandwiching a gate insulating film therebetween, a source electrode including the first contact region and the plurality of fins on a side closer to the first contact region than the gate electrode, and a drain electrode including the second contact region and the plurality of fins on a side closer to the second contact than the gate electrode. The ratio Rd/Rs of a resistance Rd of each fin in the drain region to a resistance Rs of each fin in the source region is larger than 1.

摘要翻译： 半导体器件具有形成在半导体衬底上的多个翅片以彼此分离，第一接触区域与多个翅片的共同的一端侧连接;第二接触区域，其共同连接多个翅片的另一端侧; 翅片，栅电极，通过在其间夹有栅极绝缘膜而布置成与所述多个翅片的至少两个侧表面相对，在所述第一触点更靠近所述第一触点的一侧包括所述第一接触区域和所述多个翅片的源电极 区域，以及包括第二接触区域的漏电极和在比栅电极更靠近第二接触的一侧的多个翅片。 漏极区域中的每个鳍​​片的电阻Rd与源极区域中的每个鳍​​片的电阻Rs的比Rd / Rs大于1。

公开(公告)号：US07989856B2

公开(公告)日：2011-08-02

申请号：US12335701

申请日：2008-12-16

申请人： Masakazu Goto ,  Nobutoshi Aoki ,  Takashi Izumida ,  Kimitoshi Okano ,  Satoshi Inaba ,  Ichiro Mizushima

发明人： Masakazu Goto ,  Nobutoshi Aoki ,  Takashi Izumida ,  Kimitoshi Okano ,  Satoshi Inaba ,  Ichiro Mizushima

IPC分类号： H01L21/336

CPC分类号： H01L29/785 ,  H01L29/7845

摘要： A fin transistor includes: a substrate; a plurality of semiconductor fins formed on the substrate; a gate electrode covering a channel region of the semiconductor fins; and a member as a stress source for the semiconductor fins included in a region of the gate electrode and the region provided between the semiconductor fins, and the member being made of a different material from the gate electrode.

摘要翻译： 翅片晶体管包括：衬底; 形成在所述基板上的多个半导体翅片; 覆盖半导体鳍片的沟道区域的栅电极; 以及作为用于包括在栅极电极的区域中的半导体鳍片的应力源的构件和设置在半导体鳍片之间的区域，并且该构件由与栅电极不同的材料制成。

公开(公告)号：US20070063224A1

公开(公告)日：2007-03-22

申请号：US11495885

申请日：2006-07-31

申请人： Takeshi Watanabe ,  Kimitoshi Okano ,  Takashi Izumida

发明人： Takeshi Watanabe ,  Kimitoshi Okano ,  Takashi Izumida

IPC分类号： H01L27/10 ,  H01L29/73 ,  H01L29/768 ,  H01L27/148

CPC分类号： H01L21/823437 ,  H01L21/823412 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device includes a fin-shaped semiconductor layer, a gate electrode section formed in a widthwise direction of the semiconductor layer with a gate insulation film interposed therebetween, the gate electrode section including a plurality of electrode materials having different work functions and stacked one another, and a channel section formed adjacent to the gate insulation film in the semiconductor layer. The semiconductor device further includes source and drain regions formed adjacent to the channel section.

摘要翻译： 半导体器件包括鳍状半导体层，在半导体层的宽度方向上形成有栅极绝缘膜的栅电极部，栅电极部分包括具有不同功函数且彼此堆叠的多个电极材料 以及与半导体层中的栅极绝缘膜相邻形成的沟道部。 半导体器件还包括与沟道部分相邻形成的源区和漏区。

公开(公告)号：US07868395B2

公开(公告)日：2011-01-11

申请号：US11495885

申请日：2006-07-31

申请人： Takeshi Watanabe ,  Kimitoshi Okano ,  Takashi Izumida

发明人： Takeshi Watanabe ,  Kimitoshi Okano ,  Takashi Izumida

IPC分类号： H01L27/088

CPC分类号： H01L21/823437 ,  H01L21/823412 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device includes a fin-shaped semiconductor layer, a gate electrode section formed in a widthwise direction of the semiconductor layer with a gate insulation film interposed therebetween, the gate electrode section including a plurality of electrode materials having different work functions and stacked one another, and a channel section formed adjacent to the gate insulation film in the semiconductor layer. The semiconductor device further includes source and drain regions formed adjacent to the channel section.

摘要翻译： 半导体器件包括鳍状半导体层，在半导体层的宽度方向上形成有栅极绝缘膜的栅电极部，栅电极部分包括具有不同功函数且彼此堆叠的多个电极材料 以及与半导体层中的栅极绝缘膜相邻形成的沟道部。 半导体器件还包括与沟道部分相邻形成的源区和漏区。

公开(公告)号：US09024364B2

公开(公告)日：2015-05-05

申请号：US13599613

申请日：2012-08-30

申请人： Kimitoshi Okano

发明人： Kimitoshi Okano

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L29/786 ,  H01L27/088

CPC分类号： H01L29/7851 ,  H01L27/088 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/51 ,  H01L29/7843 ,  H01L29/785 ,  H01L29/78696

摘要： A semiconductor device in one embodiment includes a semiconductor substrate, a fin disposed on a surface of the semiconductor substrate, an insulator including a gate insulator disposed on a side surface of the fin, and a gate electrode disposed on the insulator that is disposed on side surfaces of the fin and an upper surface of the fin. The device further includes a plurality of epitaxial stripe shaped layers disposed horizontally on the side surface of the fin at different heights, and an interlayer dielectric disposed on the semiconductor substrate to cover the fin and applying a stress to the fin and the epitaxial layers. Any two adjacent epitaxial layers along the fin height direction determine a gap and the gaps between adjacent layers increase or decrease with increasing distance from the substrate.

摘要翻译： 在一个实施例中的半导体器件包括半导体衬底，设置在半导体衬底的表面上的鳍，绝缘体，其包括设置在鳍的侧表面上的栅极绝缘体，以及设置在绝缘体上的栅电极， 翅片的表面和翅片的上表面。 该装置还包括在不同高度的翅片的侧表面上水平设置的多个外延条状层，以及设置在半导体衬底上以覆盖翅片并向鳍和外延层施加应力的层间电介质。 沿着翅片高度方向的任何两个相邻的外延层确定间隙，并且相邻层之间的间隙随着与衬底的距离的增加而增加或减小。

公开(公告)号：US20120064687A1

公开(公告)日：2012-03-15

申请号：US13227622

申请日：2011-09-08

申请人： Yoshiyuki Kondo ,  Kimitoshi Okano ,  Shigeru Kawanaka

发明人： Yoshiyuki Kondo ,  Kimitoshi Okano ,  Shigeru Kawanaka

IPC分类号： H01L21/8234 ,  H01L21/336

CPC分类号： H01L21/2652 ,  H01L21/26586 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823437 ,  H01L29/1083 ,  H01L29/66545

摘要： According to one embodiment, a method of manufacturing a semiconductor device includes: forming a gate electrode on a substrate via a gate dielectric film; forming a first insulating film on the gate electrode, the first insulating film having a first groove in a central region of the first insulating film; and forming a halo region in the substrate below a side surface of the gate electrode, by injecting an impurity into the substrate through the first insulating film.

摘要翻译： 根据一个实施例，制造半导体器件的方法包括：通过栅极电介质膜在衬底上形成栅电极; 在所述栅电极上形成第一绝缘膜，所述第一绝缘膜在所述第一绝缘膜的中心区域具有第一槽; 以及通过所述第一绝缘膜将杂质注入到所述衬底中，在所述栅电极的侧表面下方的所述衬底中形成晕圈。

公开(公告)号：US20090256208A1

公开(公告)日：2009-10-15

申请号：US12421143

申请日：2009-04-09

申请人： Kimitoshi Okano

发明人： Kimitoshi Okano

IPC分类号： H01L29/78 ,  H01L21/762

CPC分类号： H01L21/324 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/785

摘要： A method of fabricating a semiconductor device according to one embodiment includes: forming a fin and a film on a semiconductor substrate, the film being located at least either on the fin or under the fin and on the semiconductor substrate; forming a gate electrode so as to sandwich both side faces of the fin via a gate insulating film; and expanding or shrinking the film, thereby generating a strain in a height direction of the fin in a channel region.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：在半导体衬底上形成鳍片和薄膜，所述薄膜位于鳍片上或翅片下方至少在半导体衬底上; 形成栅极电极，以便经由栅极绝缘膜夹住鳍片的两个侧面; 并且使膜膨胀或收缩，从而在通道区域中在翅片的高度方向产生应变。

公开(公告)号：US08791028B2

公开(公告)日：2014-07-29

申请号：US13571981

申请日：2012-08-10

申请人： Kimitoshi Okano

发明人： Kimitoshi Okano

IPC分类号： H01L21/461 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/785 ,  H01L29/66795 ,  H01L29/6681

摘要： According to one embodiment, a manufacturing method of a semiconductor device includes a step of forming a dummy-fin semiconductor on a semiconductor substrate; a step of forming an insulating layer, into which a lower part of the dummy-fin semiconductor is buried, on the semiconductor substrate; a step of forming a fin semiconductor, which is bonded to a side face at an upper part of the dummy-fin semiconductor, on the insulating layer; and a step of removing the dummy-fin semiconductor on the insulating layer with the fin semiconductor being left on the insulating layer.

摘要翻译： 根据一个实施例，半导体器件的制造方法包括在半导体衬底上形成虚拟鳍式半导体的步骤; 在所述半导体基板上形成埋入所述虚拟半导体半导体的下部的绝缘层的工序; 在所述绝缘层上形成与所述虚拟散热片半导体的上部的侧面接合的翅片半导体的工序; 以及在所述绝缘层上残留有所述鳍状半导体的绝缘层上去除所述虚设鳍状半导体的步骤。

公开(公告)号：US08237226B2

公开(公告)日：2012-08-07

申请号：US12421143

申请日：2009-04-09

申请人： Kimitoshi Okano

发明人： Kimitoshi Okano

IPC分类号： H01L21/70

CPC分类号： H01L21/324 ,  H01L29/66795 ,  H01L29/7843 ,  H01L29/785

摘要： A method of fabricating a semiconductor device according to one embodiment includes: forming a fin and a film on a semiconductor substrate, the film being located at least either on the fin or under the fin and on the semiconductor substrate; forming a gate electrode so as to sandwich both side faces of the fin via a gate insulating film; and expanding or shrinking the film, thereby generating a strain in a height direction of the fin in a channel region.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：在半导体衬底上形成鳍片和薄膜，所述薄膜位于鳍片上或翅片下方至少在半导体衬底上; 形成栅极电极，以便经由栅极绝缘膜夹住鳍片的两个侧面; 并且使膜膨胀或收缩，从而在通道区域中在翅片的高度方向产生应变。

公开(公告)号：US07915693B2

公开(公告)日：2011-03-29

申请号：US12179995

申请日：2008-07-25

申请人： Kimitoshi Okano

发明人： Kimitoshi Okano

IPC分类号： H01L27/088

CPC分类号： H01L29/7843 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

摘要： A semiconductor device according to an embodiment includes: a semiconductor substrate; a fin formed on the semiconductor substrate; a gate electrode formed so as to sandwich both side faces of the fin between its opposite portions via a gate insulating film; an extension layer formed on a region of a side face of the fin, the region being on the both sides of the gate electrode, the extension layer having a plane faced to a surface of the semiconductor substrate at an acute angle; and a silicide layer formed on a surface of the plane faced to the surface of the semiconductor substrate at an acute angle.

摘要翻译： 根据实施例的半导体器件包括：半导体衬底; 在半导体衬底上形成的鳍; 栅电极，其经由栅极绝缘膜在其相对部分之间夹住所述鳍片的两个侧面; 所述延伸层形成在所述翅片的侧面的区域上，所述区域位于所述栅电极的两侧，所述延伸层具有以锐角面对所述半导体基板的表面的平面; 以及形成在面向半导体衬底的表面的平面的表面上以锐角形成的硅化物层。