Semiconductor device
    1.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号:US07923788B2

    公开(公告)日:2011-04-12

    申请号:US12207121

    申请日:2008-09-09

    IPC分类号: H01L21/28 H01L29/08

    CPC分类号: H01L29/785 H01L29/66795

    摘要: A semiconductor device has a plurality of fins formed on a semiconductor substrate to be separated from each other, a first contact region which connects commonly one end side of the plurality of fins, a second contact region which connects commonly the other end side of the plurality of fins, a gate electrode arranged to be opposed to at least both side surfaces of the plurality of fins by sandwiching a gate insulating film therebetween, a source electrode including the first contact region and the plurality of fins on a side closer to the first contact region than the gate electrode, and a drain electrode including the second contact region and the plurality of fins on a side closer to the second contact than the gate electrode. The ratio Rd/Rs of a resistance Rd of each fin in the drain region to a resistance Rs of each fin in the source region is larger than 1.

    摘要翻译: 半导体器件具有形成在半导体衬底上的多个翅片以彼此分离,第一接触区域与多个翅片的共同的一端侧连接;第二接触区域,其共同连接多个翅片的另一端侧; 翅片,栅电极,通过在其间夹有栅极绝缘膜而布置成与所述多个翅片的至少两个侧表面相对,在所述第一触点更靠近所述第一触点的一侧包括所述第一接触区域和所述多个翅片的源电极 区域,以及包括第二接触区域的漏电极和在比栅电极更靠近第二接触的一侧的多个翅片。 漏极区域中的每个鳍​​片的电阻Rd与源极区域中的每个鳍​​片的电阻Rs的比Rd / Rs大于1。

    Semiconductor device using MEMS technology
    3.
    发明授权
    Semiconductor device using MEMS technology 有权
    半导体器件采用MEMS技术

    公开(公告)号:US07582940B2

    公开(公告)日:2009-09-01

    申请号:US11341910

    申请日:2006-01-30

    申请人: Tatsuya Ohguro

    发明人: Tatsuya Ohguro

    IPC分类号: H01L27/20 H01L41/08

    摘要: A semiconductor device using a MEMS technology according to an example of the present invention comprises a cavity, a lower electrode positioned below the cavity, a moving part positioned in the cavity, an upper electrode coupled with the moving part, a film which covers an upper part of the cavity and has an opening, and a material which closes the opening and seals the cavity.

    摘要翻译: 使用根据本发明的示例的MEMS技术的半导体器件包括腔,位于腔下方的下电极,位于空腔中的移动部分,与移动部件耦合的上电极,覆盖上部 空腔的一部分并具有开口,以及封闭开口并密封空腔的材料。

    Semiconductor device and method of manufacturing the same
    4.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号:US07176529B2

    公开(公告)日:2007-02-13

    申请号:US10847314

    申请日:2004-05-18

    申请人: Tatsuya Ohguro

    发明人: Tatsuya Ohguro

    IPC分类号: H01L23/62

    CPC分类号: H01L27/0274

    摘要: A semiconductor device includes a semiconductor substrate having a resistivity of at least 30 Ω·cm, a first MISFET formed on the semiconductor substrate to function as a protective element, and a second MISFET protected by the first MISFET.

    摘要翻译: 半导体器件包括具有至少30Ω·cm的电阻率的半导体衬底,形成在半导体衬底上用作保护元件的第一MISFET以及由第一MISFET保护的第二MISFET。

    Semiconductor wafer, semiconductor device and manufacturing method of semiconductor device
    5.
    发明申请
    Semiconductor wafer, semiconductor device and manufacturing method of semiconductor device 失效
    半导体晶片,半导体器件及半导体器件的制造方法

    公开(公告)号:US20060261410A1

    公开(公告)日:2006-11-23

    申请号:US11399603

    申请日:2006-04-07

    申请人: Tatsuya Ohguro

    发明人: Tatsuya Ohguro

    IPC分类号: H01L27/12

    摘要: A semiconductor wafer includes a semiconductor bulk; a first insulating layer formed on the semiconductor bulk; a first semiconductor layer formed on the first insulating layer; a second insulating layer formed on the first semiconductor layer; and a second semiconductor layer formed on the second insulating layer.

    摘要翻译: 半导体晶片包括半导体本体; 形成在半导体本体上的第一绝缘层; 形成在所述第一绝缘层上的第一半导体层; 形成在所述第一半导体层上的第二绝缘层; 以及形成在所述第二绝缘层上的第二半导体层。

    Variable-capacitance element, variable-capacitance device, and portable phone including variable-capacitance device
    6.
    发明申请
    Variable-capacitance element, variable-capacitance device, and portable phone including variable-capacitance device 有权
    可变电容元件,可变电容器件以及包括可变电容器件的便携式电话

    公开(公告)号:US20060209491A1

    公开(公告)日:2006-09-21

    申请号:US11137794

    申请日:2005-05-26

    IPC分类号: H01G5/00

    CPC分类号: H01G5/16 H01G5/18

    摘要: A variable-capacitance element includes: a first electrode and a second electrode which are fixed on a substrate with a spacing; a movable electrode; an actuator which is supported on a supporting portion provided on the substrate to drive the movable electrode. The movable electrode is put in an electrically connecting state with the second electrode, when the movable electrode is driven to a first position by the actuator, and the movable electrode is put in an electrically non-connected state with the second electrode, when the movable electrode is driven to a second position by the actuator. The movable electrode is constituted to be always put in an electrically non-connected state with the first electrode.

    摘要翻译: 可变电容元件包括:以间隔固定在基板上的第一电极和第二电极; 可动电极; 支撑在设置在基板上的支撑部上以驱动可动电极的致动器。 当可动电极通过致动器驱动到第一位置时,可动电极与第二电极处于电连接状态,并且可移动电极与第二电极处于与电不连接的状态,当可移动电极 电极被致动器驱动到第二位置。 可动电极构成为与第一电极总是处于非连接状态。

    Semiconductor device having spiral-shaped inductor
    7.
    发明申请
    Semiconductor device having spiral-shaped inductor 审中-公开
    具有螺旋形电感器的半导体器件

    公开(公告)号:US20060163694A1

    公开(公告)日:2006-07-27

    申请号:US11315598

    申请日:2005-12-23

    申请人: Tatsuya Ohguro

    发明人: Tatsuya Ohguro

    IPC分类号: H01L29/00

    摘要: An element isolation region is formed in a surface region of a semiconductor substrate. A spiral-shaped inductor is formed above the element isolation region. A conductive region to which a constant potential is applied is formed inside the inner circumference of the inductor.

    摘要翻译: 元件隔离区域形成在半导体衬底的表面区域中。 螺旋形电感器形成在元件隔离区域上方。 在电感器的内周形成有施加恒定电位的导电区域。

    Semiconductor device including a CMOSFET of a single-gate
    10.
    发明授权
    Semiconductor device including a CMOSFET of a single-gate 失效
    包括具有单栅极结构的CMOSFET的半导体器件

    公开(公告)号:US5736767A

    公开(公告)日:1998-04-07

    申请号:US675720

    申请日:1996-07-02

    摘要: A semiconductor device including a CMOSFET having first and second channel type MOSFETs, respectively formed in a first semiconductor region of a first conductivity type and in a second semiconductor region of a second conductivity type. The first channel type MOSFET has a first gate electrode insulatively formed on the first region, made of a first conductivity type semiconductor, and having a gate length of 0.2 .mu.m or less, first source/drain regions of the second conductivity type respectively formed in the first region and having a LDD structure, and a buried channel region of the second conductivity type formed just below the first gate electrode. The second channel type MOSFET has a second gate electrode insulatively formed on the second region, made of a first conductivity type semiconductor, and having a gate length of 0.2 .mu.m or less, second source/drain regions of the first conductivity type respectively formed in the second region and having a LDD structure.

    摘要翻译: 一种半导体器件,包括具有第一和第二沟道型MOSFET的CMOSFET,分别形成在第一导电类型的第一半导体区域和第二导电类型的第二半导体区域中。 第一沟道型MOSFET具有第一栅极电极,绝缘地形成在第一区域上,由第一导电型半导体制成,栅极长度为0.2μm以下,第二导电类型的第一源极/漏极区分别形成在 所述第一区域具有LDD结构,以及形成在所述第一栅电极正下方的所述第二导电类型的掩埋沟道区。 第二沟道型MOSFET具有在第二区域上隔绝地形成的第二栅电极,由第一导电型半导体制成,栅极长度为0.2μm以下,第一导电类型的第二源/漏区分别形成在 第二区域并具有LDD结构。